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PDF AK8181C Data sheet ( Hoja de datos )

Número de pieza AK8181C
Descripción 3.3V LVPECL 1:2 Clock Fanout Buffer
Fabricantes AKM 
Logotipo AKM Logotipo



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No Preview Available ! AK8181C Hoja de datos, Descripción, Manual

AK8181C
3.3V LVPECL 1:2
Preliminary Clock Fanout Buffer
AK8181C
Features
Two differential 3.3V LVPECL outputs
Selectable two LVTTL/LVCMOS inputs
Clock output frequency up to 266MHz
Output skew : 20ps maximum
Part-to-part skew : 200ps maximum
Propagation delay : 1.4ns maximum
Additive phase jitter(RMS) : 0.03ps(typical)
Operating Temperature Range: -40 to +85
Package: 14-pin TSSOP (Pb free)
Pin compatible with ICS8535I-21
Description
The AK8181C is a member of AKMLVPECL
clock fanout buffer family designed for telecom,
networking and computer applications, requiring a
range of clocks with high performance and low
skew. The AK8181C distributes 2 buffered
clocks.
AK8181C are derived from AKMlong-term-
experienced clock device technology, and enable
clock output to perform low skew. The AK8181C
is available in a 14-pin TSSOP package.
Block Diagram
draft-E-01
-1-
Feb-2013
http://www.Datasheet4U.com

1 page




AK8181C pdf
AK8181C
Parameter Measurement Information
2.0V
Zo = 50W
Qx
SCOPE
Zo = 50W
Qxn
50W
-1.3V ± 0.165V
50W
Figure 1 3.3V Output Load Test Circuit
Part 1
Qxn
Qx
Part 2
Qyn
Qy
tsk(pp)
Figure 2 Part-to-Part Skew
Qxn
Qx
Qyn
Qy
tsk(o)
Figure 3 Output Skew
Clock
Outputs
20%
80%
tR
80%
tF
VSWING
20%
Figure 4 Output Rise/Fall Time
Figure 5 Propagation Delay
Figure 6 Output Duty/ Pulse Width/ Period
draft-E-01
-5-
Feb-2013

5 Page










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