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PDF MCP3903 Data sheet ( Hoja de datos )
| Número de pieza | MCP3903 | |
| Descripción | Six Channel Delta Sigma A/D Converter | |
| Fabricantes | Microchip | |
| Logotipo |  |
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MCP3903
Six Channel Delta Sigma A/D Converter
Features
• Six Synchronous Sampling 16/24-bit Resolution
Delta-Sigma A/D Converters with Proprietary
Multi-Bit Architecture
• 91 dB SINAD, -100 dBc Total Harmonic Distortion
(THD) (up to 35th harmonic), 102 dB Spurious-free
Dynamic Range (SFDR) for Each Channel
• Programmable Data Rate up to 64 ksps
• Ultra Low-Power Shutdown Mode with <2 μA
• -115 dB Crosstalk Between any Two Channels
• Low Drift Internal Voltage Reference: 5 ppm/°C
• Differential Voltage Reference Input Pins
• High Gain PGA on Each Channel (up to 32 V/V)
• Phase Delay Compensation Between Each Pair
of Channels with 1 μs Time Resolution
• High-Speed Addressable 10 MHz SPI Interface
with Mode 0,0 and 1,1 Compatibility
• Independent Analog and Digital Power Supplies
4.5V - 5.5V AVDD, 2.7V - 3.6V DVDD
• Available in Small 28-lead SSOP Package
• Extended Temperature Range: -40°C to +125°C
Applications
• Energy Metering and Power Measurement
• Portable Instrumentation
• Medical and Power Monitoring
Description
The MCP3903 is a six-channel Analog Front End (AFE)
containing three pairs made out of two synchronous
sampling Delta-Sigma Analog-to-Digital Converters
(ADC) with PGA, a phase delay compensation block,
internal voltage reference, and high-speed 10 MHz SPI
compatible serial interface. The converters contain a
proprietary dithering algorithm for reduced idle tones
and improved THD.
The internal register map contains 24-bit wide ADC
data words, a modulator output register as well as six
24-bit writable control registers to program gain,
over-sampling ratio, phase, resolution, dithering,
shut-down, reset and several communication features.
The communication is largely simplified with various
Continuous Read modes that can be accessed by the
Direct Memory Access (DMA) of an MCU and with
separate Data Ready pins that can directly be
connected to the Interrupt Request (IRQ) input of an
MCU. The MCP3903 is capable of interfacing to a large
variety of voltage and current sensors including shunts,
current transformers, Rogowski coils, and Hall-effect
sensors.
Package Type
28-Lead SSOP
AVDD
CH0+
CH0-
CH1-
1
2
3
4
CH1+ 5
CH2+
CH2-
CH3-
CH3+
6
7
8
9
CH4+ 10
CH4- 11
CH5- 12
CH5+ 13
REFIN/OUT+ 14
28 DVDD
27 RESET
26 SDI
25 SDO
24 SCK
23 CS
22 OSC2
21 OSC1
20 DRC
19 DRB
18 DRA
17 DGND
16 AGND
15 REFIN-
© 2011 Microchip Technology Inc.
DS25048B-page 1
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
www.DataSheet.co.kr
MCP3903
TABLE 1-1: ANALOG SPECIFICATIONS TARGET TABLE (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = 4.5 to 5.5V, DVDD = 2.7 to
3.6V, Internal VREF, MCLK = 4 MHz;PRESCALE = 1; OSR = 64; fS = 1 MHz; fD = 15.625 ksps; TA = -40°C to +125°C,
GAIN = 1, VIN = 1VPP = 353mVRMS @ 50/60 Hz.
Param.
Num.
Symbol
Characteristic
Min. Typ. Max. Units
Test Conditions
A028
MCLK Master Clock Frequency
Range
1 — 16.384 MHz (Note 8)
Power Specifications
P001
P002
P003
AVDD
DVDD
AIDD
Operating Voltage, Analog
Operating Voltage, Digital
Operating Current, Analog
(Note 4)
P004
DIDD Operating Current, Digital
4.5 —
2.7 —
7.1
5.5
3.6
9
12.3 16.8
— 1.2 1.7
V
V
mA BOOST bits low on all chan-
nels
mA BOOST bits high on all
channels
mA DVDD = 3.6V, MCLK =
4 MHz
— 2.4 3.4
mA DVDD = 3.6V, MCLK =
8.192 MHz
P005
IDDS,A Shutdown Current, Analog
——
1
μA -40°C to 85°C, AVDD pin
only, (Note 5)
——
3
μA -40°C to 125°C, AVDD pin
only, (Note 5)
P006
IDDS,D Shutdown Current, Digital
——
1
μA -40°C to 85°C, DVDD pin
only, (Note 5)
——
5
μA -40°C to 125°C, DVDD pin
only, (Note 5)
Note 1:
2:
3:
4:
5:
6:
7:
8:
This specification implies that the ADC output is valid over this entire differential range, i.e. there is no distortion or
instability across this input range. Dynamic Performance is specified at -0.5 dB below the maximum signal range,
VIN = -0.5 dBFS @ 50/60 Hz = 333 mVRMS, VREF = 2.4V.
See terminology section for definition.
This parameter is established by characterization and not 100% tested.
For these operating currents, the following configuration bit settings apply: Config Register Settings:
SHUTDOWN<5:0> = 000000, RESET<5:0> = 000000; VREFEXT = 0, CLKEXT = 0.
For these operating currents, the following configuration bit settings apply: Config Register Settings:
SHUTDOWN<5:0> = 111111, VREFEXT = 1, CLKEXT = 1.
Applies to all gains. Offset error is dependant on PGA gain setting.
Outside of this range, ADC accuracy is not specified. An extended input range of +/- 6V can be applied continuously to
the part with no risk for damage.
For proper operation and to keep ADC accuracy, AMCLK should always be in the range of 1 to 5 MHz with BOOST bits
off. With BOOST bits on, AMCLK should be in the range of 1 to 8.192 MHz. AMCLK = MCLK/PRESCALE. When using a
crystal, CLKEXT bit should be equal to ‘0’.
© 2011 Microchip Technology Inc.
DS25048B-page 5
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
www.DataSheet.co.kr
MCP3903
Note: Unless otherwise indicated, AVDD = 5.0V, DVDD = 3.3 V; TA = +25°C, MCLK = 4 MHz; PRESCALE = 1; OSR =
64; GAIN = 1; Dithering OFF; VIN = -0.5 dBFS @ 60 Hz.
.
-60 120
fs=15.625KHz
-70
OSR=64
100
fs=15.625KHz
OSR=64
-80
Dithering OFF
-90
80
60
-100
-110
Dithering ON
40
20
-120
20 50 100 200 500 1000 2000
Input Frequency (Hz)
FIGURE 2-13:
Total Harmonic Distortion
vs. Input Signal Frequency.
0
-40 -20 0 25 45 85 105 125
Temperature (°C)
FIGURE 2-16:
Signal-to-Noise and
Distortion vs. Temperature.
0
fs=15.625KHz
-20 OSR=64
-40
-60
-80
-100
-120
-40 -20 0 25 45 85 105 125
Temperature (°C)
FIGURE 2-14:
Total Harmonic Distortion
vs. Temperature.
90
80
70
60
50
40
30
20
10
0
-10
0.00001 0.001
0.1
10
Input Signal Amplitude (mV)
FIGURE 2-17:
Signal-to-Noise and
Distortion vs. Input Signal Amplitude.
1000
100
90 Dithering OFF
80
70 Dithering ON
60
50
40
30
20
fs=15.625KHz
OSR=64
10
0
20 50 100 200 500 1000 2000
Input Frequency (Hz)
FIGURE 2-15:
Signal-to-Noise and
Distortion vs. Input Signal Frequency.
FIGURE 2-18:
Signal-to-Noise and
Distortion vs. Master Clock.
© 2011 Microchip Technology Inc.
DS25048B-page 11
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MCP3903.PDF ] | |
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