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PDF MCP3901 Data sheet ( Hoja de datos )
| Número de pieza | MCP3901 | |
| Descripción | Two Channel Analog Front End | |
| Fabricantes | Microchip Technology | |
| Logotipo |  |
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MCP3901
Two Channel Analog Front End
Features
• Two synchronous sampling 16/24-bit resolution
Delta-Sigma A/D Converters with proprietary
multi-bit architecture
• 91 dB SINAD, -104 dBc THD (up to 35th harmonic),
109 dB SFDR for each channel
• Programmable data rate up to 64 ksps
• Ultra low power shutdown mode with <2 µA
• -133 dB Crosstalk between the two channels
• Low Drift Internal Voltage Reference: 12 ppm/°C
• Differential Voltage Reference Input Pins
• High Gain PGA on each channel (up to 32 V/V)
• Phase Delay Compensation between the two
channels with 1 µs time resolution
• Separate Modulator outputs for each channel
• High-Speed Addressable 20 MHz SPI Interface
with Mode 0,0 and 1,1 Compatibility
• Independent analog and digital power supplies
4.5V-5.5V AVDD, 2.7V-5.5V DVDD
• Low Power consumption (14 mW typical at 5V)
• Available in small 20-lead QFN and SSOP
packages
• Industrial Temperature Range -40°C to +85°C
Applications
www.DataShee•t4EUn.ceormgy Metering & Power Measurement
• Automotive
• Portable Instrumentation
• Medical and Power Monitoring
Description
The MCP3901 is a dual channel analog front end (AFE)
containing two synchronous sampling delta-sigma
Analog-to-Digital Converters (ADC), two PGAs, phase
delay compensation block, internal voltage reference,
modulator output block, and high-speed 20 MHz SPI
compatible serial interface. The converters contain a
proprietary dithering algorithm for reduced idle tones
and improved THD.
The internal register map contains 24-bit wide ADC
data words, a modulator output byte as well as six
writable control registers to program gain,
over-sampling ratio, phase, resolution, dithering, shut-
down, reset and several communication features. The
communication is largely simplified with various
continuous read modes that can be accessed by the
DMA of a MCU and with separate data ready pin that
can directly be connected to an IRQ input of a MCU.
The MCP3901 is capable of interfacing to a large
variety of voltage and current sensors including shunts,
current transformers, Rogowski coils, and Hall effect
sensors.
Package Type
20-Lead RESET
SSOP
DVDD
AVDD
CH0+
CH0-
CH1-
CH1+
AGND
REFIN/OUT+
REFIN-
1
2
3
4
5
6
7
8
9
10
20 SDI
19 SDO
18 SCK
17 CS
16 OSC2
15 OSC1/CLKI
14 DR
13 MDAT0
12 MDAT1
11 DGND
20-Lead
QFN
20 19 18 17 16
CH0+ 1
15 SCK
CH0- 2
CH1- 3
CH1+ 4
14 CS
EP
21 13 OSC2
12 OSC1/CLKI
AGND 5
11 DR
6 7 8 9 10
© 2009 Microchip Technology Inc.
DS22192A-page 1
1 page  
MCP3901
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, AVDD = 4.5 to 5.5V, DVDD = 2.7 to 5.5 V; -40°C < TA <+85°C,
MCLK = 4 MHz; PRESCALE = 1; OSR = 64; GAIN = 1; Dithering OFF; VIN = -0.5 dBFS = 353 mVRMS @ 50/60 Hz.
Parameters
Symbol Min Typical Max
Units
Conditions
AC Power Supply Rejection
AC PSRR —
-77
—
DC Power Supply Rejection
DC PSRR —
-77
—
dB AVDD and DVDD = 5V +
1VPP @ 50/60 Hz
dB AVDD and DVDD = 4.5 to
5.5V
DC Common Mode Rejection
Ratio Note 2
CMRR
-72
dB VCM varies from -1V to
+1V
Oscillator Input
Master Clock Frequency Range MCLK
1
—
16.384
MHz (Note 8)
Power Specifications
Operating Voltage, Analog
Operating Voltage, Digital
Operating Current, Analog
(Note 4)
AVDD
4.5
—
5.5
DVDD
2.7
3.6
5.5
AIDD
—
2.1
2.8
— 3.8 5.6
V
V
BOOST<1:0> = 00
mA BOOST<1:0> = 11
Operating Current, Digital
DIDD — 0.45 0.8
mA DVDD = 5V,
MCLK = 4 MHz
— 0.25 0.35 mA DVDD = 2.7V,
MCLK = 4 MHz
— 1.2 1.6 mA DVDD = 5V,
MCLK = 8.192 MHz
Shutdown Current, Analog
IDDS,A
—
—
1
µA AVDD pin only(Note 5)
Shutdown Current, Digital
IDDS,D
—
—
1
µA DVDD pin only(Note 5)
Note 1: This specification implies that the ADC output is valid over this entire differential range and that there is no
distortion or instability across this input range. Dynamic Performance specified at -0.5 dB below the
maximum signal range, VIN = -0.5 dBFS @ 50/60 Hz = 353 mVRMS, VREF = 2.4V.
2: See terminology section for definition.
3: This parameter is established by characterization and not 100% tested.
4: For these operating currents, the following bit settings apply: SHUTDOWN<1:0>=00, RESET<1:0>=00,
www.DataSheet4U.com VREFEXT=0, CLKEXT=0.
5: For these operating currents, the following configuration bit settings apply: SHUTDOWN<1:0>=11,
VREFEXT=1, CLKEXT=1.
6: Applies to all gains. Offset error is dependant on PGA gain setting, see Figure 2-19 for typical values.
7: Outside of this range, the ADC accuracy is not specified. An extended input range of ±6V can be applied
continuously to the part with no risk for damage.
8: For proper operation and to keep ADC accuracy, AMCLK should always be in the range of 1 to 5 MHz with
BOOST bits off. With BOOST bits on, AMCLK should be in the range of 1 to 8.192 MHz.
AMCLK = MCLK/PRESCALE. When using a crystal, CLKEXT bit should be equal to 0.
SERIAL INTERFACE SPECIFICATIONS
Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = 4.5 to 5.5V,
DVDD = 2.7 to 5.5V, -40°C < TA <+85°C, CLOAD = 30 pF.
Parameters
Sym Min Typ Max Units
Conditions
Serial Clock frequency
fSCK
—
—
—
—
CS setup time
tCSS
25
50
—
—
Note 1: This parameter is periodically sampled and not 100% tested.
20
10
—
—
MHz
MHz
ns
ns
4.5 ≤ DVDD ≤ 5.5
2.7 ≤ DVDD < 5.5
4.5 ≤ DVDD ≤ 5.5
2.7 ≤ DVDD < 5.5
© 2009 Microchip Technology Inc.
DS22192A-page 5
5 Page 
MCP3901
Note: Unless otherwise indicated, AVDD = 5.0V, DVDD = 5.0 V; TA = +25°C, MCLK = 4 MHz; PRESCALE = 1;
OSR = 64; GAIN = 1; Dithering OFF; VIN = -0.5dBFS @ 60 Hz.
95
90 OSR = 256
85 OSR = 128
80
75
70 OSR = 64
65
60
55 OSR = 32
50
45
40
1 2 4 8 16
Gain (V/V)
32
FIGURE 2-13:
Signal-to-Noise and
Distortion vs. Gain (Dithering On).
14
fIN = 60 Hz
12 MCLK = 4 MHz
OSR = 256
10 Dithering On
8
6
4
2
0
-105.0 -104.5 -104.0 -103.5 -103.0 -102.5 -102.0
Total Harmonic Distortion (dBc)
FIGURE 2-16:
Total Harmonic Distortion
Histogram (Dithering On).
0
-20
-40
-60
-80
-100
-120
Dithering OFF
Dithering ON
32 64 128
Oversampling Ratio (OSR)
256
FIGURE 2-14:
Total Harmonic Distortion
vs. Oversampling Ratio.
0
-20
-40
-60
-80
-100
-120
-50 -25
0 25 50 75 100 125 150
Temperature (ºC)
FIGURE 2-17:
Total Harmonic Distortion
vs. Temperature.
www.DataSheet4U.com100
80
60
fD = 15.625 ksps
40
20
0
-20
-40
-60
-80
10
SINC filter notch at 15.625 Hz
100
1000
10000
Input Signal Frequency (Hz)
FIGURE 2-15:
Total Harmonic Distortion
vs. Input Signal Frequency.
90
80
70
60
50
40
30
20
10
0
10
fD = 15.625 ksps
SINC filter notch at 15.625 Hz
100 1000
Input Signal Frequency (Hz)
10000
FIGURE 2-18:
Signal-to-Noise and
Distortion vs. Input Frequency.
© 2009 Microchip Technology Inc.
DS22192A-page 11
11 Page | ||
| Páginas | Total 60 Páginas | |
| PDF Descargar | [ Datasheet MCP3901.PDF ] | |
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