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PDF MCP3905 Data sheet ( Hoja de datos )

Número de pieza MCP3905
Descripción (MCP3905 / MCP3906) Energy-Metering ICs
Fabricantes Microchip Technology 
Logotipo Microchip Technology Logotipo



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No Preview Available ! MCP3905 Hoja de datos, Descripción, Manual

Obsolete Device
Replacement Device:
MCP3905A/MCP3906A
MCP3905/06
Energy-Metering ICs with Active (Real) Power Pulse Output
Features
• Supplies active (real) power measurement for
single-phase, residential energy-metering
• Supports the IEC 62053 International Energy
Metering Specification and legacy IEC 1036/
61036/687 Specifications
• Two multi-bit, Digital-to-Analog Converters
(DACs), second-order, 16-bit, Delta-Sigma
Analog-to-Digital Converters (ADCs)
• 0.1% typical measurement error over 500:1
dynamic range (MCP3905)
• 0.1% typical measurement error over 1000:1
dynamic range (MCP3906)
• Programmable Gain Amplifier (PGA) for small-
signal inputs supports low-value shunt current
sensor
- 16:1 PGA - MCP3905
- 32:1 PGA - MCP3906
• Ultra-low drift on-chip reference: 15 ppm/°C
(typical)
• Direct drive for electromagnetic mechanical
counter and two-phase stepper motors
• Low IDD of 4 mA (typical)
• Tamper output pin for negative power indication
• Industrial Temperature Range: -40°C to +85°C
• Supplies instantaneous active (real) power on
www.DataSheet4HUF.cOomUT for meter calibration
US Patents Pending
Functional Block Diagram
G0 G1
CH0+
CH0-
REFIN/
OUT
CH1+
CH1-
+
PGA
16-bit
Multi-level
ΔΣ ADC
2.4V
Reference
+
16-bit
Multi-level
ΔΣ ADC
HPF
HPF1
HPF1
Description
The MCP3905/06 devices are energy-metering ICs
designed to support the IEC 62053 International
Metering Standard Specification. They supply a
frequency output proportional to the average active
(real) power, as well as a higher-frequency output
proportional to the instantaneous power for meter
calibration. They include two 16-bit, delta-sigma ADCs
for a wide range of IB and IMAX currents and/or small
shunt (< 200 µOhms) meter designs. It includes an
ultra-low drift voltage reference with < 15 ppm/°C
through a specially designed band gap temperature
curve for the minimum gradient across the industrial
temperature range. A fixed-function DSP block is
on-chip for active (real) power calculation. Strong
output drive for mechanical counters are on-chip to
reduce field failures and mechanical counter sticking. A
no-load threshold block prevents any current creep
measurements. A Power-On Reset (POR) block
restricts meter performance during low-voltage
situations. These accurate energy-metering ICs with
high field reliability are available in the industry-
standard pinout.
Package Type
24-Pin SSOP DVDD
HPF
AVDD
NC
CH0+
CH0-
CH1-
CH1+
MCLR
REFIN/OUT
AGND
F2
1
2
3
4
5
6
7
8
9
10
11
12
24 FOUT0
23 FOUT1
22 HFOUT
21 DGND
20 NEG
19 NC
18 OSC2
17 OSC1
16 G0
15 G1
14 F0
13 F1
OSC1 OSC2
HFOUT
F2 F1 F0
FOUT0
FOUT1
NEG
X LPF1
E-to-F
conversion
POR
MCLR
© 2009 Microchip Technology Inc.
DS21948E-page 1

1 page




MCP3905 pdf
MCP3905/06
TIMING CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 4.5V – 5.5V,
AGND, DGND = 0V, MCLK = 3.58 MHz; TA = -40°C to +85°C.
Parameter
Sym Min Typ Max Units
Comment
Frequency Output
FOUT0 and FOUT1 Pulse Width
(Logic-Low)
tFW 275 ms 984376 MCLK periods
(Note 1)
HFOUT Pulse Width
tHW 90 — ms 322160 MCLK periods
(Note 2)
FOUT0 and FOUT1 Pulse Period
HFOUT Pulse Period
FOUT0 to FOUT1 Falling-Edge Time
FOUT0 to FOUT1 Min Separation
FOUT0 and FOUT1 Output High Voltage
FOUT0 and FOUT1 Output Low Voltage
HFOUT Output High Voltage
HFOUT Output Low Voltage
High-Level Input Voltage
(All Digital Input Pins)
tFP
tHP
tFS2
tFS
VOH
VOL
VOH
VOL
VIH
Refer to Equation 4-1
Refer to Equation 4-2
0.5 tFP
4/MCLK
4.5
— — 0.5
4.0
— — 0.5
2.4
s
s
V IOH = 10 mA, DVDD = 5.0V
V IOL = 10 mA, DVDD = 5.0V
V IOH = 5 mA, DVDD = 5.0V
V IOL = 5 mA, DVDD = 5.0V
V DVDD = 5.0V
Low-Level Input Voltage
(All Digital Input Pins)
VIL — — 0.85 V DVDD = 5.0V
Input Leakage Current
Pin Capacitance
— — ±3
µA VIN = 0, VIN = DVDD
— — 10 pF Note 3
Note 1:
2:
3:
If output pulse period (tFP) falls below 984376*2 MCLK periods, then tFW = 1/2 tFP.
If output pulse period (tHP) falls below 322160*2 MCLK periods, then tHW = 1/2 tHP.
Specified by characterization, not production tested.
www.DataSheet4U.com FOUT0
FOUT1
tFW
tFS2
tFP
tFS
HFOUT
tHW
tHP
NEG
FIGURE 1-1:
Output Timings for Pulse Outputs and Negative Power Pin.
© 2009 Microchip Technology Inc.
DS21948E-page 5

5 Page





MCP3905 arduino
MCP3905/06
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
MCP3905/06
SSOP-24
Symbol
Definition
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
www.DataSheet4U.com
22
23
24
DVDD
HPF
AVDD
NC
CH0+
CH0-
CH1-
CH1+
MCLR
REFIN/OUT
AGND
F2
F1
F0
G1
G0
OSC1
OSC2
NC
NEG
DGND
HFOUT
FOUT1
FOUT0
Digital Power Supply Pin
High-Pass Filters Control Logic Pin
Analog Power Supply Pin
No Connect
Non-Inverting Analog Input Pin for Channel 0 (Current Channel)
Inverting Analog Input Pin for Channel 0 (Current Channel)
Inverting Analog Input Pin for Channel 1 (Voltage Channel)
Non-Inverting Analog Input Pin for Channel 1 (Voltage Channel)
Master Clear Logic Input Pin
Voltage Reference Input/Output Pin
Analog Ground Pin, Return Path for internal analog circuitry
Frequency Control for HFOUT Logic Input Pin
Frequency Control for FOUT0/1 Logic Input Pin
Frequency Control for FOUT0/1 Logic Input Pin
Gain Control Logic Input Pin
Gain Control Logic Input Pin
Oscillator Crystal Connection Pin or Clock Input Pin
Oscillator Crystal Connection Pin or Clock Output Pin
No Connect
Negative Power Logic Output Pin
Digital Ground Pin, Return Path for Internal Digital Circuitry
High-Frequency Logic Output Pin (Intended for Calibration)
Differential Mechanical Counter Logic Output Pin
Differential Mechanical Counter Logic Output Pin
3.1 Digital VDD (DVDD)
DVDD is the power supply pin for the digital circuitry
within the MCP3905/06.
DVDD requires appropriate bypass capacitors and
should be maintained to 5V ±10% for specified
operation. Please refer to Section 5.0 “Applications
Information”.
3.3 Analog VDD (AVDD)
AVDD is the power supply pin for the analog circuitry
within the MCP3905/06.
AVDD requires appropriate bypass capacitors and
should be maintained to 5V ±10% for specified
operation. Please refer to Section 5.0 “Applications
Information”.
3.2 High-Pass Filter Input Logic Pin
(HPF)
HPF controls the state of the high-pass filter in both
input channels. A logic ‘1’ enables both filters,
removing any DC offset coming from the system or the
device. A logic ‘0’ disables both filters, allowing DC
voltages to be measured.
© 2009 Microchip Technology Inc.
DS21948E-page 11

11 Page







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