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PDF SI3461 Data sheet ( Hoja de datos )

Número de pieza SI3461
Descripción SINGLE-PORT IEEE 802.3AT POE/POE PSE INTERFACE
Fabricantes Silicon Laboratories 
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Si3461
SINGLE-PORT IEEE 802.3AT POE/POE+ PSE INTERFACE
Features
IEEE 802.3atTM compliant PSE
Autonomous operation requires
no host processor interface
IEEE-compliant disconnect
Inrush current control
Short-circuit output fault
protection
Complete reference design
LED status signal (detect,
available, including Si3461
power good, output fault)
controller and schematic:
UNH Interoperability Test Lab
Low-cost BOM
report available
Compact PCB footprint
Operates directly from a +50 V
isolated supply
Supports up to 30 W maximum
output power (Class 4)
Robust 3-point detection algorithm
eliminates false detection events
Extended operating range
(–40 to +85 °C)
11-Pin Quad Flat No-Lead
(QFN) package
Tiny 3x3 mm PCB footprint;
RoHS-compliant
Applications
Pin Assignments
Si3461
CLSMARK 1
DC1 2
VDD 3
DC2 4
CLSMODE 5
GND
10 STATUS
9 ISENSE
8 RST
7 VSENSE
6 DETA
11-pin QFN (3x3 mm)
Top View—Pads on bottom of package
IEEE 802.3at endpoints and
midspans
Environment A and B PSEs
Embedded PSEs
Set-top boxes
FTTH media converters
Cable modem and DSL
gateways
Description
The Si3461 is a single-port power management controller for IEEE
802.3at-compliant Power Sourcing Equipment (PSE). The Si3461 can
be powered from a 50 V input using a shunt regulator, or, to save
power, it can be powered from 50 V and 3.3 V power supplies. The
IEEE-required Powered Device (PD) detection feature uses a robust
3-point algorithm to avoid false detection events. The Si3461's
reference design kit also provides full IEEE-compliant classification
and PD disconnect. Intelligent protection circuitry includes input under-
voltage lockout (UVLO), classification-based current limiting, and
output short-circuit protection. The Si3461 is designed to operate
completely independently of host processor control. An LED status
signal is provided to indicate the port status, including detection,
power good, and output fault event information. The Si3461 is pin-
programmable to support four available power levels, endpoint and
mid-span applications, and auto-retry or restart after disconnect
functions. A comprehensive reference design kit is available (Si3461-
EVB), including a complete schematic and bill of materials.
Rev. 1.0 5/10
Copyright © 2010 by Silicon Laboratories
Si3461
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Si3461
2. Si3461 Electrical Specifications
The following specifications apply to the Si3461 controller. Refer to Tables 4 and 5 and the Si3461-EVB User's
Guide and schematics for additional details about the electrical specifications of the Si3461-EVB reference design.
Table 1. Recommended Operating Conditions
Description
Symbol
Test Conditions
Min Typ Max Unit
Operating Temperature Range
Thermal Impedance
VDD Input Supply Voltage
TA –40 25 +85 °C
JA
No airflow
— 75 — °C/W
VDD
During all operating modes
(detect, classification, disconnect)
2.7
3.3
3.6
V
Table 2. Absolute Maximum Ratings*
Parameter
Conditions
Max Rating Unit
Ambient Temperature Under Bias
–55 to +125
°C
Storage Temperature
–65 to +150
°C
Voltage on RST or any I/O pin with respect to GND
VDD > 2.2 V
–0.3 to 5.8
V
Voltage on VDD with respect to GND
–0.3 to 4.2
V
Maximum Total Current through VDD
and GND
500 mA
Maximum Output Current into CLSMARK, DC1,
DC2, CLSMODE, STATUS, ISENSE, RST,
VSENSE, DETA (any I/O pin)
100 mA
ESD Tolerance
Human Body Model
–2 kV to +2 kV V
Lead Temperature
Soldering, 10 seconds maximum
260
°C
*Note: Stresses above those listed in this table may cause permanent device damage. This is a stress rating only, and
functional operation of the devices at these or any conditions above those indicated in the operational listings of this
specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Rev. 1.0
5
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Si3461
4. Si3461-EVB Functional Description
In combination with low-cost external components, the Si3461 controller provides a complete PSE solution for
embedded PoE applications. The Si3461-EVB reference design operates from a +50 V isolated power supply and
delivers power to the powered device through a FET switch without controlling the output voltage while in the
power-on state.
Refer to the Si3461-EVB User's Guide and schematics for descriptions in the following sections.
The basic sequence of applying power is shown in Figure 3. Following is the description of the function that must
be performed in each phase.
-2.8V
-10V
-15.5V
-20.5V
Ch1: PoE output voltage referenced to the +50V rail
Detection
Classification
-44V
-57V
Power-on
tDET_CYCLE
tCLASS_CYCLE
tPWRUP
Figure 3. Basic Power-up Sequence
Rev. 1.0
11
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