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PDF SKY72302 Data sheet ( Hoja de datos )

Número de pieza SKY72302
Descripción 6.1 GHz Dual Fractional-N Frequency Synthesizer
Fabricantes Skyworks Solutions 
Logotipo Skyworks Solutions Logotipo



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DATA SHEET
SKY72302: Spur-Free, 6.1 GHz Dual Fractional-N Frequency
Synthesizer
Applications
General purpose RF systems
2.5G and 3G wireless infrastructures
Broadband wireless access
www.DataSheetL4oUw.cobmit rate wireless telemetry
Wireless Local Loop (WLL)
Instrumentation
Features
Spur-free operation
6.1 GHz maximum operating frequency
1000 MHz maximum auxiliary synthesizer
Ultra-fine step size, 400 Hz or less
High internal reference frequency enables large loop bandwidth
implementations
Very fast switching speed (e.g., below 100 µs)
Phase noise to –80 dBc/Hz inside loop filter bandwidth
@ 6100 MHz
Software programmable power-down modes
High speed serial interface up to 100 Mbps
Three-wire programming
Programmable division ratios on reference frequency
Phase detectors with programmable gains to provide a
programmable loop bandwidth
Frequency power steering further enhances rapid acquisition
time
On-chip crystal oscillator
Frequency adjust for temperature compensation
Direct digital modulation
Skyworks offers lead (Pb)-free, RoHS (Restriction of
Hazardous Substances) compliant packaging.
3 V operation
5 V output to loop filter
EP-TSSOP (28-pin, 9.7 x 6.4 x 1.1 mm) Pb-free (MSL3, 260 °C
per JEDEC J-STD-020) package
Description
Skyworks SKY72302 direct digital modulation fractional-N
frequency synthesizer provides ultra-fine frequency resolution,
fast switching speed, and low phase-noise performance. This
synthesizer is a key building block for high-performance radio
system designs that require low power and fine step size.
The ultra-fine step size of less than 400 Hz allows this synthesizer
to be used in very narrowband wireless applications. With proper
temperature sensing or through control channels, the
synthesizer’s fine step size can compensate for crystal oscillator
or Intermediate Frequency (IF) filter drift. As a result, crystal
oscillators or crystals can replace temperature-compensated or
ovenized crystal oscillators, reducing parts count and associated
component cost. The device’s fine step size can also be used for
Doppler shift corrections.
The SKY72302 has a phase noise floor of –80 dBc/Hz up to
6.1 GHz operation as measured inside the loop bandwidth. This is
permitted by the on-chip low noise dividers and low divide ratios
provided by the device’s high fractionality.
Reference crystals or oscillators up to 50 MHz can be used with
the SKY72302. The crystal frequency is divided down by
independent programmable dividers (1 to 32) for the main and
auxiliary synthesizers. The phase detectors can operate at a
maximum speed of 25 MHz, which allows better phase noise due
to the lower division value. With a high reference frequency, the
loop bandwidths can also be increased. Larger loop bandwidths
improve the settling times and reduce in-band phase noise.
Therefore, typical switching times of less than 100 µs can be
achieved. The lower in-band phase noise also permits the use of
lower cost Voltage Controlled Oscillators (VCOs) in customer
applications.
The SKY72302 has a frequency power steering circuit that helps
the loop filter to steer the VCO when the frequency is too fast or
too slow, further enhancing acquisition time.
Innovation to GoTM
Now available for purchase online.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
101216K • Skyworks Proprietary and Confidential information • Products and Product Information are Subject to Change Without Notice • May 16, 2007
1

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SKY72302 pdf
DATA SHEET • SKY72302 FREQUENCY SYNTHESIZER
Fractional-N Applications. The desired division ratio for the
main synthesizer is given by:
Nfraction al = (---4F----V×----C-F--O--d--_-i--mv--_-a--r-i-e-n-f--)-
The desired division ratio for the auxiliary synthesizer is given by:
Nf rac ti on al
=
F-----V---C---O----_---a---u---x
Fdiv_ref
where Nfractional must be between 150 and 2150 for the main
synthesizer or between 37.5 and 537.5 for the auxiliary
synthesizer.
www.DataSheTeht4eUv.caolume to be programmed by the Main or Auxiliary Divider
Register is given by:
N reg = Round( N fractional )32
NOTE: The Round function rounds the number to the nearest
integer.
When in fractional mode, allowed values for Nreg are from 6 to 505
inclusive.
The value to be programmed by either of the MSB/LSB Dividend
Registers or the Auxiliary Dividend Register is given by:
dividend = Round [ divider ×( N fractional N reg 32 )]
where the divider is either 1024 in 10-bit mode or 262144 in
18-bit mode. Therefore, the dividend is a signed binary value
either 10 or 18 bits long.
NOTE: Because of the high fractionality of the SKY72302, there is
no practical need for any integer relationship between the
reference frequency and the channel spacing or desired
VCO frequencies.
Sample calculations for two fractional-N applications are provided
in Figure 4.
Integer-N Applications. The desired division ratio for the main or
auxiliary synthesizer is given by:
N = FFint eger
vco _ main
div _ ref
where Ninteger is an integer number from 32 to 543.
The value to be programmed by the Main or Auxiliary Divider
Register is given by:
N reg = Nint eger 32
When in integer mode, allowed values for Nreg are from 0 to 511
for both the main and auxiliary synthesizers.
NOTE: As with all integer-N synthesizers, the minimum step size
is related to the crystal frequency and reference frequency
division ratio.
A sample calculation for an integer-N application is provided in
Figure 5.
Register Loading Order. In applications where the main
synthesizer is in 18-bit mode, the Main Dividend MSB Register
holds the 10 MSBs of the dividend and the Main Dividend LSB
Register holds the 8 LSBs of the dividend. The registers that
control the main synthesizer’s divide ratio are to be loaded in the
following order:
Main Divider Register
Main Dividend LSB Register
Main Dividend MSB Register (at which point the new divide ratio
takes effect)
In applications where the main synthesizer is in 10-bit mode, the
Main Dividend MSB Register holds the 10 bits of the dividend. The
registers that control the main synthesizer’s divide ratio are to be
loaded in the following order:
Main Divider Register
Main Dividend MSB Register (at which point the new divide ratio
takes effect)
For the auxiliary synthesizer, the Auxiliary Dividend Register holds
the 10 bits of the dividend. The registers that control the auxiliary
synthesizer’s divide ratio are to be loaded in the following order:
Auxiliary Divider Register
Auxiliary Dividend Register (at which point the new divide ratio
takes effect)
NOTE: When in integer mode, the new divide ratios take effect as
soon as the Main or Auxiliary Divider Register is loaded.
Direct Digital Modulation
The high fractionality and small step size of the SKY72302 allow
the user to tune to practically any frequency in the VCO’s
operating range. This allows direct digital modulation by
programming the different desired frequencies at precise
instants. Typically, the channel frequency is programmed by the
Main Divider and MSB/LSB Dividend Registers, and the
instantaneous frequency offset from the carrier is programmed by
the Modulation Data Register.
The Modulation Data Register can be accessed in three ways as
defined in the following subsections.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
101216K • Skyworks Proprietary and Confidential information • Products and Product Information are Subject to Change Without Notice • May 16, 2007
5

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SKY72302 arduino
DATA SHEET • SKY72302 FREQUENCY SYNTHESIZER
The Auxiliary Dividend Register controls the fraction part of the
desired fractional-N value and allows an offset of –0.5 to +0.5 to
the auxiliary integer selected through the Auxiliary Divider
Register. As shown in Figure 10, the value to be loaded is:
Auxiliary Synthesizer Dividend = Ten-bit value for the auxiliary
synthesizer dividend.
General Synthesizer Registers
The dual-programmable reference frequency dividers provide the
reference frequencies to the phase detectors by dividing the
crystal oscillator frequency. The lower five bits hold the reference
www.DataSheferte4qUu.ecnocmy divide index for the main phase detector. The next five
bits hold the reference frequency divide index for the auxiliary
phase detector. Divide ratios from 1 to 32 are possible for each
reference frequency divider (see Tables 2 and 3).
The Reference Frequency Dividers Register configures the dual-
programmable reference frequency dividers for the main and
auxiliary synthesizers. As shown in Figure 11, the values to be
loaded are:
Main Reference Frequency Divider Index = Desired main
oscillator frequency division ratio –1. Default value on power-up
is 0, signifying that the reference frequency is not divided for
the main phase detector.
Auxiliary Reference Frequency Divider Index = Desired auxiliary
oscillator frequency division ratio –1. Default value on power-up
is 0, signifying that the reference frequency is not divided for
the auxiliary phase detector.
A3 A2 A1 A0 11 10 9 8 7 6 5 4 3 2 1 0
0 1 0 0 X X MSB
LSB
Auxiliary Synthesizer Dividend
C1421
Figure 10. Auxiliary Dividend Register (Write Only)
Table 2. Programming the Main Reference Frequency Divider
Decimal
Bit 4 (MSB)
Bit 3
000
100
200
———
———
———
31 1
1
Bit 2
0
0
0
1
Bit 1
Bit 0 (LSB)
Reference Divider
Ratio
001
012
103
———
———
———
1 1 32
Table 3. Programming the Auxiliary Reference Frequency Divider
Decimal
Bit 9 (MSB)
Bit 8
Bit 7
0000
1000
2000
————
————
————
31 1 1 1
Bit 6
Bit 5 (LSB)
Reference Divider
Ratio
001
012
103
———
———
———
1 1 32
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
101216K • Skyworks Proprietary and Confidential information • Products and Product Information are Subject to Change Without Notice • May 16, 2007
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