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PDF SKY72300-362 Data sheet ( Hoja de datos )
| Número de pieza | SKY72300-362 | |
| Descripción | 750-850 MHz High Performance VCO/Synthesizer | |
| Fabricantes | Skyworks Solutions | |
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DATA SHEET
SKY72300-362: Spur-Free, 2.1 GHz Dual Fractional-N
Frequency Synthesizer
Applications
• General purpose RF systems
• 2.5G and 3G wireless infrastructure
• Broadband wireless access
www.DataShe•etL4oUw.cobmit rate wireless telemetry
• Instrumentation
• L-band receivers
• Satellite communications
Features
• Spur-free operation
• 2.1 GHz maximum operating frequency
• 500 MHz maximum auxiliary synthesizer
• Ultra-fine step size, 100 Hz or less
• High internal reference frequency enables large loop bandwidth
implementations
• Very fast switching speed (e.g., below 100 µs)
• Phase noise to –91 dBc/Hz inside the loop filter bandwidth
@ 1800 MHz
• Software programmable power-down modes
• High-speed serial interface up to 100 Mbps
• Three-wire programming
• Programmable division ratios on reference frequency
• Phase detectors with programmable gain to provide a
programmable loop bandwidth
• Frequency power steering further enhances rapid acquisition
time
• On-chip crystal oscillator
• Frequency adjust for temperature compensation
Skyworks offers lead (Pb)-free RoHS (Restriction of
Hazardous Substances) compliant packaging.
• Direct digital modulation
• 3 V operation
• 5 V output to loop filter
• QFN (24-pin, 4 x 4 mm) Pb-free (MSL3, 260 °C per JEDEC J-
STD-020) package
Description
Skyworks SKY72300-362 direct digital modulation fractional-N
frequency synthesizer provides ultra-fine frequency resolution,
fast switching speed, and low phase-noise performance. This
synthesizer is a key building block for high-performance radio
system designs that require low power and fine step size.
The ultra-fine step size of less than 100 Hz allows this synthesizer
to be used in very narrowband wireless applications. With proper
temperature sensing or through control channels, the
synthesizer’s fine step size can compensate for crystal oscillator
or Intermediate Frequency (IF) filter drift. As a result, crystal
oscillators or crystals can replace temperature-compensated or
ovenized crystal oscillators, reducing parts count and associated
component cost. The device’s fine step size can also be used for
Doppler shift corrections.
The SKY72300-362 has a phase noise floor of –90 dBc/Hz up to
2.1 GHz operation as measured inside the loop bandwidth. This is
permitted by the on-chip low noise dividers and low divide ratios
provided by the device’s high fractionality.
Reference crystals or oscillators up to 50 MHz can be used with
the SKY72300-362. The crystal frequency is divided down by
independent programmable dividers (1 to 32) for the main and
auxiliary synthesizers. The phase detectors can operate at a
maximum speed of 25 MHz, which allows better phase noise due
to the lower division value. With a high reference frequency, the
loop bandwidths can also be increased. Larger loop bandwidths
improve the settling times and reduce in-band phase noise.
Therefore, typical switching times of less than 100 s can be
achieved. The lower in-band phase noise also permits the use of
lower cost Voltage Controlled Oscillators (VCOs) in customer
applications.
The SKY72300-362 has a frequency power steering circuit that
helps the loop filter to steer the VCO when the frequency is too
fast or too slow, further enhancing acquisition time.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
200731B • Skyworks Proprietary and Confidential information • Products and Product Information are Subject to Change Without Notice • July 30, 2007
1
1 page  
DATA SHEET • SKY72300-362 FREQUENCY SYNTHESIZER
Clock
Data X A3 A2 A1 A0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
XXX
CS
Last
C1413
Figure 3. Serial Transfer Timing Diagram
www.DataSheet4U.com
FVCO Desired VCO frequency (either Fvco_main or Fvco_aux).
Fdiv_ref
Divided reference frequency presented to the phase
detector (either Fref_main or Fref_aux).
Fractional-N Applications. The desired division ratio for the
main and auxiliary synthesizers is given by:
N = FFfractional
VCO
div _ ref
where Nfractional must be between 37.5 and 537.5.
The value to be programmed by the Main or Auxiliary Divider
Register is given by:
Nreg = Round( N fractional )− 32
N = FFint eger
vco _ main
div _ ref
where Ninteger is an integer number from 32 to 543.
The value to be programmed by the Main or Auxiliary Divider
Register is given by:
Nreg = Nint eger − 32
When in integer mode, allowed values for Nreg are from 0 to 511
for both the main and auxiliary synthesizers.
NOTE: As with all integer-N synthesizers, the minimum step size
is related to the crystal frequency and reference frequency
division ratio.
NOTE: The Round function rounds the number to the nearest
integer.
When in fractional mode, allowed values for Nreg are from 6 to 505
inclusive.
The value to be programmed by either of the MSB/LSB Dividend
Registers or the Auxiliary Dividend Register is given by:
dividend = Round [ divider×( N fractional − Nreg − 32 )]
where the divider is either 1024 in 10-bit mode or 262144 in
18-bit mode. Therefore, the dividend is a signed binary value
either 10 or 18 bits long.
NOTE: Because of the high fractionality of the SKY72300-362,
there is no practical need for any integer relationship
between the reference frequency and the channel spacing
or desired VCO frequencies.
Sample calculations for two fractional-N applications are provided
in Figure 4.
Integer-N Applications. The desired division ratio for the main or
auxiliary synthesizer is given by:
A sample calculation for an integer-N application is provided in
Figure 5.
Register Loading Order. In applications where the main
synthesizer is in 18-bit mode, the Main Dividend MSB Register
holds the 10 MSBs of the dividend and the Main Dividend LSB
Register holds the 8 LSBs of the dividend. The registers that
control the main synthesizer’s divide ratio are to be loaded in the
following order:
• Main Divider Register
• Main Dividend LSB Register
• Main Dividend MSB Register (at which point the new divide ratio
takes effect)
In applications where the main synthesizer is in 10-bit mode, the
Main Dividend MSB Register holds the 10 bits of the dividend. The
registers that control the main synthesizer’s divide ratio are to be
loaded in the following order:
• Main Divider Register
• Main Dividend MSB Register (at which point the new divide ratio
takes effect)
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
200731B • Skyworks Proprietary and Confidential information • Products and Product Information are Subject to Change Without Notice • July 30, 2007
5
5 Page 
DATA SHEET • SKY72300-362 FREQUENCY SYNTHESIZER
A3 A2 A1 A0 11 10 9 8 7 6 5 4 3 2 1 0
0 0 1 1 X X X MSB
LSB
Auxiliary Synthesizer Divider Index
C1420
Figure 9. Auxiliary Divider Register (Write Only)
www.DataSheet4U.com
A3 A2 A1 A0 11 10 9 8 7 6 5 4 3 2 1 0
0 1 0 0 X X MSB
LSB
Auxiliary Synthesizer Dividend
C1421
Figure 10. Auxiliary Dividend Register (Write Only)
Table 2. Programming the Main Reference Frequency Divider
Decimal
Bit 4 (MSB)
Bit 3
000
100
200
———
———
———
31 1
1
Bit 2
0
0
0
—
—
—
1
Bit 1
Bit 0 (LSB)
Reference Divider
Ratio
001
012
103
———
———
———
1 1 32
Table 3. Programming the Auxiliary Reference Frequency Divider
Decimal
Bit 9 (MSB)
Bit 8
Bit 7
0000
1000
2000
————
————
————
31 1 1 1
Bit 6
Bit 5 (LSB)
Reference Divider
Ratio
001
012
103
———
———
———
1 1 32
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
200731B • Skyworks Proprietary and Confidential information • Products and Product Information are Subject to Change Without Notice • July 30, 2007
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet SKY72300-362.PDF ] | |
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