|
|
PDF ISL6269B Data sheet ( Hoja de datos )
| Número de pieza | ISL6269B | |
| Descripción | High-Performance Notebook PWM Controller | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ISL6269B (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
|
No Preview Available !
DATASHEET
High-Performance Notebook PWM Controller With
Audio-Frequency Clamp
ISL6269B
The ISL6269B IC is a Single-phase Synchronous-Buck PWM
controller featuring Intersil's Robust Ripple Regulator R3™
Technology that delivers truly superior dynamic response to
input voltage and output load transients. Integrated MOSFET
drivers and bootstrap diode result in fewer components and
smaller implementation area.
Intersil’s R3™ Technology combines the best features of
fixed-frequency PWM and hysteretic PWM while eliminating
many of their shortcomings. R3™ Technology employs an
innovative modulator that synthesizes an AC ripple voltage
signal VR, analogous to the output inductor ripple current. The
AC signal VR enters a window comparator where the lower
threshold is the error amplifier output VCOMP and the upper
threshold is a programmable voltage reference VW, resulting in
generation of the PWM signal. The voltage reference VW sets
the steady-state PWM frequency. Both edges of the PWM can be
modulated in response to input voltage transients and output
load transients, much faster than conventional fixed-frequency
PWM controllers. Unlike a conventional hysteretic converter, the
ISL6269B has an error amplifier that provides ±1% voltage
regulation at the FB pin.
The ISL6269B has a 1.5ms digital soft-start and can be
started into a pre-biased output voltage. A resistor divider is
used to program the output voltage setpoint. The ISL6269B
can be configured to operate in Continuous Conduction Mode
(CCM) or Diode Emulation Mode (DEM), which improves
light-load efficiency. In CCM the controller always operates as a
synchronous rectifier, however when DEM is enabled, the
low-side MOSFET is permitted to stay off, blocking negative
current flow into the low-side MOSFET from the output
inductor.
Features
• High performance R3™ Technology
• Fast transient response
• ±1% regulation accuracy: -10°C to +100°C and
-40° to +100°C
• Wide input voltage range: +5V to +25V
• Output voltage range: +0.6V to +3.3V
• Wide output load range: 0A to 25A
• Selectable diode emulation mode for increased light load
efficiency
• Programmable PWM frequency: 200kHz to 600kHz
• Pre-biased output start-up capability
• Integrated MOSFET drivers and bootstrap diode
• Internal digital soft-start
• Power-good monitor
• PWM minimum frequency above audible spectrum
• Fault protection
- Undervoltage protection
- Soft crowbar overvoltage protection
- Low-side MOSFET rDS(ON) overcurrent protection
- Over-temperature protection
- Fault identification by PGOOD pull-down resistance
• Pb-free (RoHS compliant)
Applications
• PCI express graphical processing unit
• Auxiliary power rail
• VRM
• Network adapter
November 17, 2014
FN6280.3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2006-2007, 2014. All Rights Reserved
Intersil (and design) and R3 Technology are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1 page  
Typical Application
ISL6269B
ISL6269B
PGOOD
VIN
RPGOOD
5V
PVCC
RVCC
VCC
CPVCC
CVCC
GND
FCCM
QHIGH_SIDE
UG
BOOT
PHASE
ISEN
CBOOT
RSEN
LOUT
VIN
5V TO 25V
CIN
VOUT
0.6V TO 3.3V
COUT
QLOW_SIDE
EN LG
RCOMP
COMP
PGND
CCOMP1
CCOMP2
FB FSET
VO
RBOTTOM
RTOP
RFSET
CFSET
Submit Document Feedback
5
FN6280.3
November 17, 2014
5 Page 
ISL6269B
The value of RSEN is then written as:
RSEN
=
---I--F----L----+------I---P-----2--------P------------O-----C-----S----P-------r--D----S------O-----N----
IOC
(EQ. 4)
Where:
- RSEN (Ω) is the resistor used to program the overcurrent
setpoint
- ISEN is the current sense current that is sourced from the
ISEN pin
- IOC is the ISEN threshold current sourced from the ISEN pin
that will activate the OCP circuit
- IFL is the maximum continuous DC load current
- IP-P is the inductor peak-to-peak ripple current
- OCSP is the desired overcurrent setpoint expressed as a
multiplier relative to IFL
Overvoltage Protection
When an OVP fault is detected, the PGOOD pin will pull down to
60Ωand latch-off the converter. The OVP fault will remain
latched
voltage
VuVnCtiCl_VTVHCFC.
has
decayed
below
the
falling
POR
threshold
The OVP fault detection circuit triggers after the voltage across
the FB and GND pins has increased above the rising overvoltage
threshold VOVR. Although the converter has latched-off in
response to an OVP fault, the LG gate-driver output will retain the
ability to toggle the low-side MOSFET on and off, in response to
the output voltage transversing the VOVR and VOVF thresholds.
Undervoltage Protection
When a UVP fault is detected, the PGOOD pin will pull down to
95Ωand latch-off the converter. The fault will remain latched
until the EN pin has been pulled below the falling EN threshold
voltage VENTHF or
threshold voltage
VifVCVVCC_CTHhFa. sThdeecUaVyPedfabueltlodwettehcetifoanllicnirgcPuiOt R
triggers after the voltage across the FB and GND pins has fallen
below the undervoltage threshold VUV.
Over-Temperature
When the temperature of the ISL6269B increases above the
rising threshold temperature TOTR, the IC will enter an OTP state
that suspends the PWM, forcing the LG and UG gate-driver
outputs low. The status of the PGOOD pin does not change nor
does the converter latch-off. The PWM remains suspended until
the IC temperature falls below the hysteresis temperature
TOTHYS at which time normal PWM operation resumes. The OTP
state can be reset if the EN pin is pulled below the falling EN
threshold
threshold
voltage
voltage
VVVECNCT_HTFHoFr.
if VVCC decays below the falling POR
All other protection circuits function
normally during OTP. It is likely that the IC will detect an UVP fault
because in the absence of PWM, the output voltage immediately
decays below the undervoltage threshold VUV; the PGOOD pin will
pull down to 95Ω and latch-off the converter. The UVP fault will
remain latched until the EN pin has been pulled below the falling
EfaNllitnhgrePsOhRoldthvroelsthaogledVvEoNltTaHgFeoVrViCfCV_VTCHCFh. as decayed below the
Programming the Output Voltage
When the converter is in regulation there will be 600mV from the
FB pin to the GND pin. Connect a two-resistor voltage divider
across the VO pin and the GND pin with the output node
connected to the FB pin. Scale the voltage-divider network such
that the FB pin is 600mV with respect to the GND pin when the
converter is regulating at the desired output voltage. The output
voltage can be programmed from 600mV to 3.3V.
Programming the output voltage is written as:
VREF
=
V
O
U
T
------------R----B----O-----T---T----O----M---------------
RTOP + RBOTTOM
(EQ. 5)
Where:
- VOUT is the desired output voltage of the converter
- VREF is the voltage that the converter regulates to between
the FB pin and the GND pin
- RTOP is the voltage programming resistor that connects
from the FB pin to the VO pin. In addition to setting the
output voltage, this resistor is part of the loop compensation
network
- RBOTTOM is the voltage programming resistor that connects
from the FB pin to the GND pin
Beginning with RTOP between 1kΩ to 5kΩ calculating RBOTTOM
is written as:
RBOTTOM
=
--V----R----E----F-------R----T----O-----P---
VOUT – VREF
(EQ. 6)
Programming the PWM Switching Frequency
The ISL6269B does not use a clock signal to produce PWM. The
PWM switching frequency fSW is programmed by the resistor
RFSET that is connected from the FSET pin to the GND pin. The
approximate PWM switching frequency is written as:
fSW = -k-------R----1-F---S----E----T--
(EQ. 7)
Estimating the value of RFSET is written as:
RFSET
=
-------1---------
k fSW
(EQ. 8)
Where:
- fSW is the PWM switching frequency
- RFSET is the fSW programming resistor
- k = 75 x 10-12
It is recommended that whenever the control loop compensation
network is modified, fSW should be checked for the correct
frequency and if necessary, adjust RFSET.
Compensation Design
The LC output filter has a double pole at its resonant frequency that
causes the phase to abruptly roll downward. The R3™ Modulator
used in the ISL6269B, makes the LC output filter resemble a first
order system in which the closed loop stability can be achieved with
a Type II compensation network.
Submit Document Feedback 11
FN6280.3
November 17, 2014
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet ISL6269B.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ISL6269 | Single Phase PWM Controller | Intersil Corporation |
| ISL6269A | High-Performance Notebook PWM Controller | Intersil Corporation |
| ISL6269B | High-Performance Notebook PWM Controller | Intersil Corporation |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |