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PDF MGP4N60E Data sheet ( Hoja de datos )
| Número de pieza | MGP4N60E | |
| Descripción | Insulated Gate Bipolar Transistor | |
| Fabricantes | Motorola Semiconductors | |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
™Designer's Data Sheet
Insulated Gate Bipolar Transistor
N–Channel Enhancement–Mode Silicon Gate
This Insulated Gate Bipolar Transistor (IGBT) uses an advanced
termination scheme to provide an enhanced and reliable high
voltage–blocking capability. Its new 600 V IGBT technology is
specifically suited for applications requiring both a high tempera-
ture short circuit capability and a low VCE(on). It also provides fast
switching characteristics and results in efficient operation at high
frequencies. This new E–series introduces an Energy–efficient,
ESD protected, and short circuit rugged device.
• Industry Standard TO–220 Package
• High Speed: Eoff = 55 mJ/A typical at 125°C
• High Voltage Short Circuit Capability – 10 ms minimum at 125°C, 400 V
• Low On–Voltage 2.0 V typical at 3.0 A, 125°C
• Robust High Voltage Termination
• ESD Protection Gate–Emitter Zener Diodes
C
G
E
Order this document
by MGP4N60E/D
MGP4N60E
IGBT IN TO–220
4.0 A @ 90°C
6.0 A @ 25°C
600 VOLTS
SHORT CIRCUIT RATED
LOW ON–VOLTAGE
G
C
E
CASE 221A–06
TO–220AB
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector–Emitter Voltage
Collector–Gate Voltage (RGE = 1.0 MΩ)
Gate–Emitter Voltage — Continuous
Collector Current — Continuous @ TC = 25°C
— Continuous @ TC = 90°C
— Repetitive Pulsed Current (1)
Total Power Dissipation @ TC = 25°C
Derate above 25°C
VCES
VCGR
VGE
IC25
IC90
ICM
PD
600 Vdc
600 Vdc
±20 Vdc
6.0 Adc
4.0
8.0 Apk
80 Watts
0.64 W/°C
Operating and Storage Junction Temperature Range
Short Circuit Withstand Time
(VCC = 400 Vdc, VGE = 15 Vdc, TJ = 125°C, RG = 20 Ω)
Thermal Resistance — Junction to Case – IGBT
— Junction to Ambient
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 5 seconds
Mounting Torque, 6–32 or M3 screw
(1) Pulse width is limited by maximum junction temperature. Repetitive rating.
TJ, Tstg
tsc
– 55 to 150
10
°C
ms
RθJC
RθJA
TL
2.0
65
260
10 lbfSin (1.13 NSm)
°C/W
°C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Designer’s is a trademark of Motorola, Inc.
© MMoototororloa,laIncT.M19O97S Power MOSFET Transistor Device Data
1
1 page  
PACKAGE DIMENSIONS
MGP4N60E
Q
H
Z
B
4
1 23
F
T
–T–
SEATING
PLANE
C
S
A
U
K
L
V
G
N
D
R
J
CASE 221A–06
TO–220AB
ISSUE Y
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
INCHES
DIM MIN MAX
A 0.570 0.620
B 0.380 0.405
C 0.160 0.190
D 0.025 0.035
F 0.142 0.147
G 0.095 0.105
H 0.110 0.155
J 0.018 0.025
K 0.500 0.562
L 0.045 0.060
N 0.190 0.210
Q 0.100 0.120
R 0.080 0.110
S 0.045 0.055
T 0.235 0.255
U 0.000 0.050
V 0.045 –––
Z ––– 0.080
MILLIMETERS
MIN MAX
14.48 15.75
9.66 10.28
4.07 4.82
0.64 0.88
3.61 3.73
2.42 2.66
2.80 3.93
0.46 0.64
12.70 14.27
1.15 1.52
4.83 5.33
2.54 3.04
2.04 2.79
1.15 1.39
5.97 6.47
0.00 1.27
1.15 –––
––– 2.04
STYLE 9:
PIN 1.
2.
3.
4.
GATE
COLLECTOR
EMITTER
COLLECTOR
Motorola TMOS Power MOSFET Transistor Device Data
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet MGP4N60E.PDF ] | |
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