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PDF AK4685 Data sheet ( Hoja de datos )

Número de pieza AK4685
Descripción Multi-channel CODEC
Fabricantes AKM 
Logotipo AKM Logotipo



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[AK4685]
AK4685
Multi-channel CODEC with Differential Analog I/O
GENERAL DESCRIPTION
The AK4685 is a single chip CODEC that integrates 4-channel ADC, 2-channel DAC and a stereo capacitor
less headphone amplifier. The converters are designed with an Enhanced Dual Bit architecture for the
ADC, and an Advanced Multi-Bit architecture for the DAC’s, enabling very low noise performance and
achieving wide dynamic range. The differential analog inputs and outputs cancel noise on analog signal
lines. Therefore, a stable system can be designed. The AK4685 has a dynamic range of 102dB for ADC,
106dB for DAC, and is well suited for digital TV and home theater systems.
FEATURES
† Asynchronous ADC/DAC1/DAC2 Operation
† 4ch 24bit ADC
- Differential Input
- 64x Oversampling
- Sampling Rate up to 48kHz
- Linear Phase Digital Anti-Alias Filter
- S/(N+D): 90dB
- Dynamic Range, S/N: 102dB
- Digital HPF for Offset Cancellation
- Channel Independent Digital Volume (+24/-103dB, 0.5dB/step)
- Soft Mute
† Two 2ch 24bit DAC’s
- Differential/Single-end Ouput (DAC1)
- 128x Oversampling
- Sampling Rate up to 192kHz
- 24bit 8 times Digital Filter
- S/(N+D): 92dB
- Dynamic Range, S/N: 106dB
- Channel Independent Digital Volume (+12/-115dB, 0.5dB/step)
- Soft Mute
† 40mW Capless Stereo Headphone Amplifier
- Output Power: 1.21Vrms @ 3.3V, THD+N(min) = -40dB
- Dynamic Range, S/N: 96dB
- Pop Noise Free at Power-ON/OFF and Mute
† Independent Mute Pins for 2 lines
† High Jitter Tolerance
† TTL Level Digital I/F
† External Master Clock Input:
256fs, 384fs, 512fs 768fs (fs=32kHz 48kHz)
128fs, 192fs, 256fs 384fs (fs=64kHz 96kHz)
128fs, 192fs (fs=120kHz ~ 192kHz)
† Audio Serial I/F (PORTA/B/C)
- Master/Slave mode (PORTB)
- I/F format : MSB justified, I2S
MS1106-E-00
-1-
2009/08

1 page




AK4685 pdf
[AK4685]
43 LIN2-
44 LIN2+
45 LVCOM2
46 VCOM
47 VSS6
48 AVDD1
49 RVCOM1
50 RIN1+
51 RIN1-
52 RAMPO1
53 LAMPO1
54 LIN1-
55 LIN1+
56 LVCOM1
57 LRCKB
58 BICKB
59 SDTOB2
60 SDTOB1
61 MCKO
62 TVDD
63 VSS7
64 DVDD1
I Lch Negative Analog Input 2 Pin
I Lch Positive Analog Input 2 Pin
O Lch VCOM Output 2 Pin
-
DAC/ADC Common Voltage Output Pin. AVDD1 x 0.5(typ).
10μF capacitor should be connected to VSS6 externally.
- ADC Analog Ground Pin, 0V
- ADC Analog Power Supply Pin, 4.75V5.25V
O Rch VCOM Output 1 Pin
I Rch Positive Analog Input 1 Pin
I Rch Negative Analog Input 1 Pin
O Rch Pre-Amp Output 1 Pin
O Lch Pre-Amp Output 1 Pin
I Lch Negative Analog Input 1 Pin
I Lch Positive Analog Input 1 Pin
O Lch VCOM Output 1 Pin
I/O ADC Channel Clock Pin
I/O ADC Audio Serial Data Clock Pin
O ADC Audio Serial Data Output 2 Pin
O ADC Audio Serial Data Output 1 Pin
O Master Clock Output Pin
- Output Buffer Power Supply Pin, 3.0V5.25V
- ADC Digital Ground Pin, 0V
- ADC Digital Power Supply Pin, 4.75V5.25V
Note 1. All digital input pins must not be left floating.
Note 2. AC coupling capacitors should be connected to analog input pins (LIN1+/-, LIN 2+/-, RIN1+/-, RIN 2+/-).
Note 3. AC coupling capacitors should be connected to analog output pins (LOUT+/-, ROUT+/-).
Handling of Unused Pin
The unused I/O pins must be processed appropriately as below.
Classification
Analog
Digital
-
Pin Name
LOUT+/-, ROUT+/-,
LIN1+, LIN 2+, RIN1+, RIN 2+
LIN1-, LIN 2-, RIN1-, RIN 2-
SDTOB1, SDTOB2, XTO, MCLKO,
LRCKB(Master), BICKB(Master)
MCLKA/C, MCB, LRCKA-C(Slave),
BICKA-C(Slave), SDTIA,C, MSB, MT1N, MT2N,
SGL
SDA, SCL
NC
Setting
These pins should be open.
These pins should be connected to each
VCOMO pins (LVCOM1/2,RVCOM1/2)
These pins should be connected to each
AMPO pins (LAMPO1/2,RAMPO1/2)
These pins should be open.
These pins should be connected to ground.
These pins should be pulled-up to DVDD3.
This pin should be connected to ground.
MS1106-E-00
-5-
2009/08

5 Page





AK4685 arduino
[AK4685]
Power Supplies
Parameter
min typ max Units
Power Supply Current
Normal Operation (PDN pin = “H”)
TVDD
(Note 17)
6 9 mA
DVDD1+AVDD1
33 47 mA
DVDD2+AVDD2
Differential mode fs=48kHz
13 19 mA
fs=96kHz
14 - mA
fs=192kHz
17 - mA
Single End mode fs=48kHz
14 - mA
fs=96kHz
15 - mA
fs=192kHz
18 - mA
DVDD3+AVDD3 (No Input)
fs=48kHz
20 30 mA
fs=96kHz
21 - mA
fs=192kHz
23 - mA
PVDD
6 9 mA
Power-Down Mode (PDN pin = “L”; Note 18)
TVDD
10 100 μA
DVDD1+AVDD1
DVDD2+AVDD2
DVDD3+AVDD3
PVDD
10 100 μA
10 100 μA
10 100 μA
10 100 μA
Note 17. Master Mode. MCB=36.864MHz. 20pF load capacitors are connected to MCKO, BICKB, LRCKB, SDTOB1 and
SDTOB2 pins.
Note 18. All digital inputs including clock pins (MCLKA, MCB, MCLKC, BICKA, BICKB, BICKC, LRCKA, LRCKB,
LRCKC, SDTIA, SDTIC) are held at DVDD1, DVDD2, DVDD3, VSS1, VSS2 or VSS7.
FILTER CHARACTERISTICS
(Ta=-20°C ~+85°C; TVDD=3.0 ~ 5.25V; DVDD1-3=AVDD1-3=4.75 ~ 5.25V; PVDD=3.0 ~ 3.6V; fs=48kHz)
Parameter
Symbol
min
typ
max Units
ADC Digital Filter (Decimation LPF):
Passband
(Note 19)
±0.1dB
PB
0
18.9 kHz
-0.2dB
- 20.0 - kHz
-3.0dB
- 23.0 - kHz
Stopband
SB 28.0
kHz
Stopband Attenuation
SA 68
dB
Group Delay
(Note 20)
GD
16 1/fs
ADC Digital Filter (HPF):
Frequency Response (Note 19)
-3dB
FR
1.0 Hz
-0.1dB
6.5 Hz
DAC Digital Filter:
Passband
(Note 19)
±0.1dB
PB
0
21.8 kHz
-6.0dB
- 24.0 - kHz
Stopband
SB 26.2
kHz
Stopband Attenuation
SA 54
dB
Group Delay
(Note 20)
GD
20 1/fs
DAC Digital Filter + Analog Filter:
Frequency Response: 0 20.0kHz
FR
±0.2
dB
40.0kHz (Note 21)
FR
±0.3
dB
80.0kHz (Note 21)
FR
±1.0
dB
Note 19. The passband and stopband frequencies scale with fs.
For example, 21.8kHz at –0.1dB is 0.454 x fs (DAC). The reference frequency of these responses is 1kHz.
MS1106-E-00
- 11 -
2009/08

11 Page







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