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PDF AK4683 Data sheet ( Hoja de datos )
| Número de pieza | AK4683 | |
| Descripción | Asynchronous Multi-Channel Audio CODEC | |
| Fabricantes | AKM | |
| Logotipo |  |
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[AK4683]
AK4683
Asynchronous Multi-Channel Audio CODEC with DIR/T
GENERAL DESCRIPTION
The AK4683 is a single chip CODEC that includes two channels of ADC and four channels of DAC. The ADC
outputs 24bit data and the DAC accepts up to 24bit input data. The ADC has the Enhanced Dual Bit
architecture with wide dynamic range. The DAC introduces the new developed Advanced Multi-Bit
architecture, and achieves wider dynamic range and lower outband noise. The AK4683 also has digital audio
receiver (DIR) and transmitter (DIT) compatible with 192kHz, 24bits. The DIR can automatically detect a
Non-PCM bit stream such as Dolby Digital (AC-3)*. The AK4683 has a dynamic range of 100dB for ADC,
106dB for DAC and is well suited for digital TV and home theater system.
* Dolby Digital (AC-3) is a trademark of Dolby Laboratories.
FEATURES
ADC/DAC part
Asynchronous ADC/DAC Operation
6:1 Input Selector with Pre-amp
2ch 24bit ADC
- 64x Oversampling
- Sampling Rate up to 96kHz
- Linear Phase Digital Anti-Alias Filter
- Single-Ended Input
- S/(N+D): 90dB
- Dynamic Range, S/N: 100dB
- Digital HPF for Offset Cancellation
- Channel Independent Digital Volume (+24/-103dB, 0.5dB/step)
- Soft Mute
- Overflow Flag
4ch 24bit DAC
- 128x Oversampling
- Sampling Rate up to 192kHz
- 24bit 8 times Digital Filter
- Single-Ended Outputs
- S/(N+D): 90dB
- Dynamic Range, S/N: 106dB
- Channel Independent Digital Volume (+12/-115dB, 0.5dB/step)
- Soft Mute
- De-emphasis Filter (32kHz, 44.1kHz, 48kHz)
- Zero Detect Function
Stereo Headphone Amp with Volume
- 50mW at 16ohm
- Click-noise free at Power on/off
High Jitter Tolerance
MS0427-E-04
-1-
2013/10
1 page  
[AK4683]
PIN/FUNCTION
No. Pin Name
1 PVDD
2 RX0
3 I2C
4 RX1
5 RX2
6 RX3
7 INT
VOUT
8 DZF
OVF
9 CDTO
10 LRCKB
11 BICKB
12 SDTOB
13 OLRCKA
14 ILRCKA
15 BICKA
16 SDTOA
17 MCKO
18 TVDD
19 DVSS
20 DVDD
21 XTI
22 XTO
23 TX
24 MCLK2
25 PDN
26
CDTI
SDA
27 CCLK
SCL
28
CSN
TEST
29 SDTIA1
30 SDTIA2
31 SDTIA3
32 SDTIB
33 HVDD
34 HVSS
35 HPR
36 HPL
37 MUTET
I/O Function
- PLL Power supply Pin, 4.5V5.5V
I Receiver Channel 0 Pin (Internal biased pin. Internally biased at PVDD/2)
I
Control Mode Select Pin.
“L”: 4-wire Serial, “H”: I2C Bus
I Receiver Channel 1 Pin
I Receiver Channel 2 Pin
I Receiver Channel 3 Pin
O Interrupt Pin
O V-bit Output Pin for Receiver Input
Zero Input Detect Pin
O When the input data of DAC follow total 8192 LRCK cycles with “0” input data, this
pin goes to “H”. And when RSTN1 bit is “0”, PWDA bit is “0”, this pin goes to “H”.
O
Analog Input Overflow Detect Pin
This pin goes to “H” if the analog input of Lch or Rch overflows.
O Control Data Output Pin in Serial Mode and I2C pin = “L”.
I/O Channel Clock B Pin
I/O Audio Serial Data Clock B Pin
O Audio Serial Data Output B Pin
I/O Output Channel Clock A Pin
I/O Input Channel Clock A Pin
I/O Audio Serial Data Clock A Pin
O Audio Serial Data Output A Pin
O Master Clock Output Pin
- Output Buffer Power Supply Pin, 2.7V5.5V
- Digital Ground Pin, 0V
- Digital Power Supply Pin, 4.5V5.5V
I X'tal Input Pin
O X'tal Output Pin
Transmit Channel Output pin
O When DIT bit = “0”, RX0~3 Through.
When DIT bit = “1”, Internal DIT Output.
I Master Clock Input Pin
Power-Down Mode & Reset Pin
I When “L”, the AK4683 is powered-down, all registers are reset. And then all digital
output pins go “L”. The AK4683 must be reset once upon power-up.
I Control Data Input Pin in Serial Mode and I2C pin = “L”.
I/O Control Data Pin in Serial Mode and I2C pin = “H”.
I Control Data Clock Pin in Serial Mode and I2C pin = “L”
I Control Data Clock Pin in Serial Mode and I2C pin = “H”
I Chip Select Pin in Serial Mode and I2C pin = “L”.
I This pin should be connected to DVSS in Serial Mode and I2C pin = “H”.
I Audio Serial Data Input A1 Pin
I Audio Serial Data Input A2 Pin
I Audio Serial Data Input A3 Pin
I Audio Serial Data Input B Pin
- HP Power Supply Pin, 4.5V5.5V
- HP Ground Pin, 0V
O HP Rch Output Pin
O HP Lch Output Pin
-
HP Common Voltage Output Pin
1F capacitor should be connected to HVSS externally.
MS0427-E-04
-5-
2013/10
5 Page 
[AK4683]
DC CHARACTERISTICS
(Ta=25C; AVDD1, AVDD2, DVDD, PVDD, HVDD=4.55.5V; TVDD=2.75.5V)
Parameter
Symbol
min
High-Level Input Voltage
(Except XTI pin) VIH
2.2
(XTI pin)
VIH 70%DVDD
Low-Level Input Voltage
(Except XTI pin)
VIL
-
(XTI pin)
VIL
-
Input Voltage at AC Coupling (XTI pin) (Note 17)
VAC 40%DVDD
High-Level Output Voltage
(Except TX pins: Iout=-400A) VOH TVDD-0.4
(TX pin: Iout=-400A) VOH DVDD-0.4
Low-Level Output Voltage
(Iout=400A) VOL
-
Input Leakage Current (Except RX0 pin)
Iin -
Note 17. In case of connecting capacitance to XTI pin.
typ
-
-
-
-
-
-
-
-
max
-
-
0.8
30%DVDD
-
-
-
0.4
10
Units
V
V
V
V
Vpp
V
V
V
A
S/PDIF RECEIVER CHARACTERISTICS (RX0)
(Ta=25C; AVDD1, AVDD2, DVDD, PVDD, HVDD=4.55.5V; TVDD=2.75.5V)
Parameter
Symbol
min
typ
Input Resistance
Zin 10
Input Voltage (internally biased at PVDD/2)
VTH
200
Input Hysteresis
VHY
-
50
Input Sample Frequency
fs 32 -
max Units
k
mVpp
mV
192 kHz
PVDD
RX0 pin
20k(typ)
20k(typ)
PVSS VCOM
Internal biased pin Circuit
S/PDIF RECEIVER CHARACTERISTICS (RX1-3)
(Ta=25C; AVDD1, AVDD2, DVDD, PVDD, HVDD=4.5~5.5V;TVDD=2.7~5.5V)
Parameter
Symbol
min
typ
High-Level Input Voltage
VIH 2.2
-
Low-Level Input Voltage
VIL -
-
Input Sample Frequency
fs 32 -
Input Leakage Current
Iin - -
max Units
V
0.8 V
192 kHz
10 A
MS0427-E-04
- 11 -
2013/10
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AK4683.PDF ] | |
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