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PDF AK4682 Data sheet ( Hoja de datos )
| Número de pieza | AK4682 | |
| Descripción | Multi-channel CODEC | |
| Fabricantes | AKM | |
| Logotipo |  |
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[AK4682]
AK4682
Multi-channel CODEC with 2Vrms Stereo Selector
GENERAL DESCRIPTION
The AK4682 is a single chip CODEC that includes two channels of ADC and four channels of DAC. The ADC
outputs 24bit data and the DAC accepts up to 24bit input data. The ADC has the Enhanced Dual Bit
architecture with wide dynamic range. The DAC introduces the new developed Advanced Multi-Bit
architecture, and achieves wider dynamic range and lower outband noise. The AK4682 integrates stereo
selector supporting 2Vrms I/O. The AK4682 has a dynamic range of 96dB for ADC, 102dB for DAC and is well
suited for digital TV and home theater system.
FEATURES
ADC/DAC part
Asynchronous ADC/DAC Operation
8:1 Stereo Selector for ADC Input
8:3 Stereo Selector with 2Vrms Output Buffer
2-channel 24bit ADC
- 64x Oversampling
- Sampling Rate up to 48kHz
- Linear Phase Digital Anti-Alias Filter
- Single-Ended Input
- S/(N+D): 88dB
- Dynamic Range, S/N: 96dB
- Digital HPF for Offset Cancellation
- Channel Independent Digital Volume (+24/-103dB, 0.5dB/step)
- Soft Mute
4-channel 24bit DAC
- 128x Oversampling
- Sampling Rate up to 192kHz
- 24bit 8 times Digital Filter
- S/(N+D): 86dB
- Dynamic Range, S/N: 102dB
- Channel Independent Digital Volume (+12/-115dB, 0.5dB/step)
- Soft Mute
- De-emphasis Filter
- Output Mode: Stereo, Mono, Reverse, Mute
High Jitter Tolerance
TTL Level Digital I/F
External Master Clock Input:
256fs, 384fs, 512fs 768fs (fs=32kHz ∼ 48kHz)
128fs, 192fs, 256fs 384fs (fs=64kHz ∼ 96kHz)
128fs, 192fs (fs=120kHz ~ 192kHz)
2 Audio Serial I/F (PORTA, PORTB)
- Master/Slave mode (for PORTB)
- I/F format
PORTA: Left(24 bit)/Right(20/24 bit) justified, I2S, TDM
PORTB: Left justified, I2S
I2C Bus μP I/F for mode setting
Operating Voltage:
- Digital I/O: 2.7V ∼ 5.25V,
- Analog: 4.75V ~ 5.25V and 8.5V ~ 12.6V
Package: 48pin LQFP (0.5mm pitch)
MS0610-E-01
-1-
2007/07
1 page  
[AK4682]
PIN/FUNCTION (continued)
No. Pin Name I/O
Function
43 LIN5
I Lch Input 5 Pin
44 RIN5
I Rch Input 5 Pin
45 NC
-
No Connection.
No internal bonding. This pin should be connected to the ground.
46 LIN6
I Lch Input 6 Pin
47 RIN6
I Rch Input 6 Pin
48 DVDD1
- ADC Digital Power Supply Pin, 4.75V∼5.25V
Note: All digital input pins must not be left floating.
Note: Analog input pins (LIN1, RIN1, LIN2, RIN2, LIN3, RIN3, LIN4, RIN4, LIN5, RIN5, LIN6, RIN6 pin) must use
the AC-coupling capacitor for signal input.
Note: Analog output pins (LOUT1, ROUT1, LOUT2, ROUT2, LOUT3, ROUT3 pins) must use the AC-coupling
capacitor for signal output.
■ Handling of Unused Pin
The unused I/O pins should be processed appropriately as below.
Classification
Analog
Digital
Pin Name
LOUT1-3, ROUT1-3, LIN1-6, RIN1-6
SDTOB, LRCKB(Master), BICKB(Master)
MCLKA, LRCKA, BICKA, SDTIA1-2, MCLKB,
LRCKB(Slave), BICKB(Slave), MSB
SDA, SCL
Setting
These pins should be open.
These pins should be open.
These pins should be connected to DVSS.
These pins should be pulled-up to DVDD2.
MS0610-E-01
-5-
2007/07
5 Page 
■ Timing Diagram
MCLK
LRCK
BICK
MCLK
LRCK
BICK
[AK4682]
1/fCLK
tCLKH
tCLKL
1/fsn, 1/fsd, 1/fsq
tBCK
tBCKH
tBCKL
Clock Timing (Normal mode)
VIH
VIL
VIH
VIL
VIH
VIL
1/fCLK
tCLKH
tCLKL
VIH
VIL
1/fsn, 1/fsd
tLRH
tLRL
VIH
VIL
tBCK
tBCKH
tBCKL
VIH
VIL
Clock Timing (TDM 128 mode)
LRCK= LRCKB, LRCKA,
BICK= BICKA, BICKB,
SDTI= SDTIA,
SDTO= SDTOB.
MS0610-E-01
- 11 -
2007/07
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AK4682.PDF ] | |
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