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PDF LT3640 Data sheet ( Hoja de datos )
| Número de pieza | LT3640 | |
| Descripción | Dual Monolithic Buck Regulator | |
| Fabricantes | Linear | |
| Logotipo |  |
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LT3640
Dual Monolithic Buck
Regulator with Power-On
Reset and Watchdog Timer
Features
Description
n High Voltage Buck Regulator:
4V to 35V Operating Range
1.3A Output Current
n OVLO Protects Input to 55V
n Low Voltage Synchronous Buck Regulator:
2.5V to 5.5V Input Voltage Range
1.1A Output Current
n Synchronizable, Adjustable 350kHz to 2.5MHz
Switching Frequency
n Programmable Power-On Reset Timer
n Programmable Window Mode Watchdog Timer
n Typical Quiescent Current: 290µA
n Short-Circuit Robust
n Programmable Soft-Start
n Low Shutdown Current: IQ < 1µA
n Available in Thermally Enhanced 28-Lead
(4mm × 5mm) QFN and 28-Lead TSSOP Packages
Applications
n Industrial Power Supplies
n Automotive Electronic Control Units
L, LT, LTC, LTM, Linear Technology, Burst Mode and the Linear logo are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
The LT®3640 is a dual channel, current mode monolithic
buck switching regulator with a power-on reset and a
watchdog timer. Both regulators are synchronized to a
single oscillator with an adjustable frequency (350kHz to
2.5MHz). At light loads, both regulators operate in low
ripple Burst Mode® to maintain high efficiency and low
output ripple.
The high voltage channel is a nonsynchronous buck with
an internal 2.4A top switch that operates from an input
of 4V to 35V; a 36.5V OVLO protects the device to 55V.
The low voltage channel operates from an input of 2.5V to
5.5V. Internal synchronous power switches provide high
efficiency without the need of external Schottky diode.
Both channels have cycle-by-cycle current limit, providing
protection against shorted outputs.
The power-on reset and watchdog timeout periods are
both adjustable using external capacitors. The window
mode watchdog timer flags when the µP pulses group
too close together or too far apart.
The LT3640 is available in a 28-pin 4mm × 5mm QFN
package and 28-pin TSSOP package. Both packages have
an exposed pad for low thermal resistance.
Typical Application
2MHz 3.3V/0.8A and 1.8V/0.8A Step Down Regulators
VIN
5V TO 35V
VOUT1
100k
µP
0.22µF
10µF
EN/UVLO VIN SW
SYNC
WDE
PGOOD
BST SW1
DA
FB1
100k
RST1
RST2
WDO
WDI
LT3640
VIN2
EN2
SW2
1.5nF
CWDT
CPOR
FB2
RT GND SS2 SS1
1.5nF
32.4k
1nF
1nF
3.3µH
80.6k
49.9k
1µH
100k
49.9k
3640 TA01a
VOUT1
3.3V/0.8A
22µF
VOUT2
1.8V/0.8A
22µF
HV Channel Efficiency,
2MHz, VOUT1 = 3.3V
90
85 VIN = 12V
80
75
70
0
0.2 0.4 0.6 0.8 1.0 1.2
VOUT1 CURRENT (A)
3640 TA01b
LV Channel Efficiency,
2MHz, VOUT2 = 1.8V
90
VIN2 = 3.3V
85
80
75
70
0
0.2 0.4 0.6
VOUT2 CURRENT (A)
0.8 1
3640 TA01c
3640f
1 page  
LT3640
Typical Performance Characteristics TA = 25°C, unless otherwise noted.
HV Channel Efficiency
(2MHz, VOUT1 = 3.3V)
90
85 VIN = 12V
VIN = 16V
80
VIN = 24V
75
HV Channel Efficiency
(2MHz, VOUT1 = 5V)
90
VIN = 12V
85
VIN = 24V VIN = 16V
80
75
LV Channel Efficiency
(2MHz, VOUT2 = 1.2V)
90
85
VIN2 = 3.3V
80
VIN2 = 5V
75
70
0
0.2 0.4 0.6 0.8 1.0 1.2
VOUT1 CURRENT (A)
3640 G01
LV Channel Efficiency
(2MHz, VOUT2 = 1.8V)
90
VIN2 = 3.3V
85 VIN2 = 5V
80
75
70
0
0.2 0.4 0.6
VOUT2 CURRENT (A)
0.8 1.0
3640 G04
70
0
0.2 0.4 0.6 0.8 1.0 1.2
VOUT1 CURRENT (A)
3640 G02
Quiescent Current vs VIN
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
0
10 20 30
VIN VOLTAGE (V)
40
3640 G05
70
0
0.2 0.4 0.6
VOUT2 CURRENT (A)
0.8 1.0
3640 G03
Quiescent Current vs Temperature
350
300
250
200
150
100
50
0
–50
0 50 100
TEMPERATURE (°C)
150
3640 G06
FB1 Voltage vs Temperature
1.40
1.35
1.30 REGULATION
1.25
1.20 RST1 THRESHOLD
1.15
1.10
1.05
1.00
–50
0 50 100
TEMPERATURE (°C)
150
3640 G07
FB1 Voltage vs SS1
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
0.5 1.0 1.5
SS1 VOLTAGE (V)
2.0
3640 G08
FB2 Voltage vs Temperature
0.70
0.65
0.60 REGULATION
RST2 THRESHOLD
0.55
0.50
0.45
–50
0 50 100
TEMPERATURE (°C)
150
3640 G09
3640f
5 Page 
LT3640
Operation
when the VIN2 pin voltage is above 2.3V, the EN2 pin is
pulled high and the FB1 pin voltage is above 1.165V. The
internal top power MOSFET is turned on each cycle at the
beginning of each oscillator cycle, and turned off when
the current flowing through the top MOSFET reaches a
level determined by the voltage at the VC2 node. An error
amplifier measures the output voltage through an external
resistor divider tied to the FB2 pin and servos the VC2
node. The reference of the error amplifier is determined by
the lower of the internal 600mV reference and the voltage
at the SS2 pin.
While the top MOSFET is off, the bottom MOSFET is turned
on in an oscillator cycle until the inductor current starts
to reverse. If the inductor current is higher than the valley
current limit at the beginning of an oscillator cycle, the top
MOSFET will not turn on in this cycle, limiting inductor
current in shorted output fault.
An internal regulator provides power to the control circuitry.
The regulator draws most power from the VIN2 pin and a
small portion of power from the VIN pin when the VIN2 pin
voltage is higher than 3V. If the voltage at VIN2 pin is lower
than 3V, the regulator draws all power from the VIN pin.
The EN/UVLO pin is used to put the LT3640 in shutdown,
reducing the input current to less than 1µA. The accurate
1.26V threshold of the EN/UVLO pin provides a program-
mableVIN undervoltagelockoutthroughanexternalresistor
divider tied to the EN/UVLO pin. A 2µA hysteresis current
on the EN/UVLO pin prevents switching noise from shut-
ting down the LT3640.
The LT3640 has an overvoltage protection feature which
disables switching action in both channels when the VIN
pin voltage goes above 36V. When switching is disabled,
the LT3640 can sustain VIN voltages up to 55V for one
second.
Internal 2µA current sources charge the SS1 pin and
the SS2 pin up to about 2V. Soft-start or output voltage
tracking of the two channels can be independently imple-
mented with capacitors from the SS1 pin and the SS2 pin
to ground. Any overvoltage or undervoltage condition on
the VIN pin triggers an internal latch that discharges the
SS1 pin to below 100mV before it is released. If the EN2
pin goes low, the VIN2 voltage falls below 2.2V or the FB1
pin goes below 1.165V, the SS2 pin will be discharged to
below 100mV before it is released.
To optimize efficiency, the LT3640 switches to low ripple
Burst Mode operation in light load situations. Between
switching pulses, control-circuitry current is minimized.
A power good comparator with 40mV of hysteresis trips
when the low voltage channel is enabled and the FB2 pin is
above 550mV. The PGOOD pin is an open-drain output that
is pulled low when both the outputs are in regulation.
Power-On Reset and Watchdog Timer
The LT3640 includes one power-on reset timer for each
buck regulator and one common watchdog timer. Power-
on reset and watchdog timers are both adjustable using
external capacitors. Operation can be best understood by
referring to the Timing Diagram.
The RST1, RST2 and WDO pins are all open-drain outputs
with weak internal pull-ups to about 2V. The RST1 and RST2
pins are pulled low when the LT3640 is enabled and VIN is
above 3.6V. Once the FB1 pin rises above 1.165V, the high
voltage channel reset timer is started and RST1 is released
after the reset timeout period. The low voltage channel reset
timer is started once the FB2 pin rises above 550mV, and
releases RST2 after the reset timeout period.
The watchdog circuit monitors a µP’s activity. As soon
as both RST1 and RST2 are released, a delay timer is
started. The watchdog timer is started after the delay timer
times out. The LT3640 implements windowed watchdog
function for higher system reliability. The watchdog timer
detects falling edges on the WDI pin. If the falling edges
are grouped too close together or too far apart, the WDO
pin is pulled down and the reset timer is started. When the
reset timer times out, WDO is released and the watchdog
timer is again started after the delay period.
3640f
11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet LT3640.PDF ] | |
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