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PDF MAX9263 Data sheet ( Hoja de datos )
| Número de pieza | MAX9263 | |
| Descripción | HDCP Gigabit Multimedia Serial Link Serializer/Deserializer | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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EVALUATION KIT AVAILABLE
MAX9263/MAX9264
HDCP Gigabit Multimedia Serial
Link Serializer/Deserializer
General Description
The MAX9263/MAX9264 chipset extends Maxim’s gigabit
multimedia serial link (GMSL) technology to include high-
bandwidth digital content protection (HDCP) encryption
of video and audio data. The MAX9263 serializer, or
any HDCP-GMSL serializer, pairs with the MAX9264
deserializer, or any HDCP-GMSL deserializer, for the
transmission of control data and HDCP encrypted video
and audio data.
The parallel interface operates with a pixel clock up to
104MHz. Three inputs are for I2S audio, supporting a
sampling frequency to 192kHz and a sample depth to
32 bits. The embedded control channel forms a full-
duplex differential 9.6kbps to 1Mbps UART link between
the serializer and deserializer. A microcontroller (FC),
can be located on the serializer side of the link, on the
deserializer side of the link, or on both sides. The control
channel enables FC control of peripherals on the remote
side, such as backlight control, touch screen, and per-
form HDCP-related operations.
For driving longer cables, the serializer has program-
mable pre/deemphasis, and the deserializer has a pro-
grammable channel equalizer. The GMSL devices have
programmable spread spectrum on the serial (serializer)
and parallel (deserializer) output. The serial link input
and output meet ISO 10605 and IEC 61000-4-2 ESD
standards. The serializer core supply is 1.8V and the
deserializer core supply is 3.3V. The I/O supply is 1.8V to
3.3V. Both devices are available in a 64-pin TQFP pack-
age with an exposed pad and are specified over the
-40NC to +105NC automotive temperature range.
Applications
High-Resolution Automotive Navigation
Rear-Seat Infotainment
Megapixel Camera Systems
Benefits and Features
S Ideal for HDCP Video Applications
Supports Up to XGA (1280 x 768) or Dual-View
WVGA (2x 854 x 480)
Pre/Deemphasis and Equalization Allows 15m
Cable at Full Speed
Up to 192kHz, 32-Bit/Sample I2S
S Multiple Data Rates for System Flexibility
Up to 3.12Gbps Serial-Bit Rate
6.25MHz to 104MHz Pixel Clock
100kbps to 1Mbps UART and UART-to-I2C
Control Channel
S Reduces EMI and Shielding Requirements
Serial Output Programmable for 100mV to
400mV
Programmable Spread Spectrum Reduces EMI
Bypassable Input PLL for Jitter Attenuation
S Peripheral Features for System Power-Up and
Verification
Built-In PRBS Tester for BER Testing of the
Serial Link
Interrupt Transmission from Deserializer to
Serializer
S Meets Rigorous Automotive and Industrial
Requirements
-40°C to +105°C Operating Temperature
ISO 10605 and IEC 61000-4-2 ESD Tolerance
Ordering Information
PART
MAX9263GCB/V+
MAX9263GCB/V+T
MAX9264GCB/V+
MAX9264GCB/V+T
TEMP RANGE
-40NC to +105NC
-40NC to +105NC
-40NC to +105NC
-40NC to +105NC
PIN-PACKAGE
64 TQFP-EP*
64 TQFP-EP*
64 TQFP-EP*
64 TQFP-EP*
/V denotes an automotive qualified product.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
T = Tape and reel.
Blu-ray is a trademark of Blu-ray Disc Association.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-5644; Rev 2; 9/14
1 page  
MAX9263/MAX9264
HDCP Gigabit Multimedia Serial
Link Serializer/Deserializer
MAX9263 AC ELECTRICAL CHARACTERISTICS
(VDVDD = VAVDD = 1.7V to 1.9V, VIOVDD = 1.7V to 3.6V, RL = 100I Q1% (differential), TA = -40NC to +105NC, unless otherwise noted.
Typical values are at VDVDD = VAVDD = VIOVDD = 1.8V, TA = +25NC.)
PARAMETER
Deterministic Serial Output Jitter
Parallel Data Input Setup Time
Parallel Data Input Hold Time
Serializer Delay (Notes 6, 7)
(Figure 1)
Link Start Time
Power-Up Time
I2S INPUT TIMING
WS Frequency
Sample Word Length
SYMBOL
tDSOJ2
tSET
tHOLD
tSD
tLOCK
tPU
CONDITIONS
3.125Gbps PRBS signal
(Figure 8, Note 6)
(Figure 8, Note 6)
(Figure 9)
Spread spectrum enabled
Spread spectrum disabled
(Figure 10)
(Figure 11)
fWS See Table 2
nWS See Table 2
MIN TYP MAX UNITS
0.15 UI
1 ns
1.5 ns
2830
270
Bits
3.5 ms
6 ms
8 192 kHz
4 32 bits
SCK Frequency
fSCK
fSCK = fWS x nWS x 2
(8 x
4) x 2
(192 x
32) x 2
kHz
SCK Clock High Time
tHC VSCK R VIH, tSCK = 1/fSCK
0.35 x
tSCK
ns
SCK Clock Low Time
tLC VSCK P VIL, tSCK = 1/fSCK
0.35 x
tSCK
ns
SD, WS Setup Time
SD, WS Hold Time
tSET
tHOLD
(Figure 12)
(Figure 12)
2 ns
2 ns
MAX9264 DC ELECTRICAL CHARACTERISTICS
(VAVDD = VDVDD = 3.0V to 3.6V, VIOVDD = 1.7V to 3.6V, RL = 100I Q1% (differential), TA = -40NC to +105NC, unless otherwise noted.
Typical values are at VAVDD = VDVDD = VIOVDD = 3.3V, TA = +25NC.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
SINGLE-ENDED INPUTS (ENABLE, BWS, INT, CDS, ES, EQS, DCS, MS, PWDN, SSEN, DRS)
High-Level Input Voltage
VIH1
0.65 x
VIOVDD
V
Low-Level Input Voltage
VIL1
Input Current
IIN1 VIN = 0 to VIOVDD
Input Clamp Voltage
VCL ICL = -18mA
SINGLE-ENDED OUTPUTS (WS, SCK, SD, DOUT_, PCLKOUT)
0.35 x
VIOVDD
V
-10 +10 FA
-1.5 V
High-Level Output Voltage
VOH1 IOUT = -2mA
DCS = IOGND
VDCS = VIOVDD
VIOVDD
- 0.3
VIOVDD
- 0.2
V
Low-Level Output Voltage
VOL1 IOUT = 2mA
DCS = IOGND
VDCS = VIOVDD
0.3
0.2
V
Maxim Integrated
5
5 Page 
MAX9263/MAX9264
HDCP Gigabit Multimedia Serial
Link Serializer/Deserializer
Typical Operating Characteristics (continued)
(VAVDD = VDVDD = VIOVDD = 1.8V (MAX9263), VAVDD = VDVDD = VIOVDD = 3.3V (MAX9264), TA = +25NC, unless otherwise noted.)
OUTPUT POWER SPECTRUM vs. PCLK
FREQUENCY (VARIOUS MAX9263 SPREAD)
0
-10 fPCLK = 33MHz
-20 0% SPREAD
0.5% SPREAD
-30
-40
-50
-60
-70
-80
-90
30
2% SPREAD
4% SPREAD
31 32 33 34 35
36
PCLK FREQUENCY (MHz)
OUTPUT POWER SPECTRUM vs. PCLK
FREQUENCY (VARIOUS MAX9263 SPREAD)
0
-10 fPCLK = 66MHz
-20 0% SPREAD
0.5% SPREAD
-30
-40
-50
-60
-70
-80
-90
61
2% SPREAD 4% SPREAD
63 65 67 69
PCLK FREQUENCY (MHz)
71
MAXIMUM PCLK FREQUENCY
vs. STP CABLE LENGTH (BER < 10-9)
120
100
80
OPTIMUM
PE/EQ SETTINGS
60
NO PE, 10.7dB
EQUALIZATION
40 NO PE, 5.2dB
EQUALIZATION
20 BER CAN BE AS LOW AS 10-12 FOR
CABLE LENGTHS LESS THAN 10m
0
0 5 10 15
STP CABLE LENGTH (m)
20
Maxim Integrated
OUTPUT POWER SPECTRUM vs. PCLK
FREQUENCY (VARIOUS MAX9264 SPREAD)
0
-10 fPCLK = 33MHz
-20 0% SPREAD
-30
-40
-50
-60
-70
-80
-90
30
2% SPREAD
4% SPREAD
31 32 33 34 35
36
PCLK FREQUENCY (MHz)
OUTPUT POWER SPECTRUM vs. PCLK
FREQUENCY (VARIOUS MAX9264 SPREAD)
0
-10 fPCLK = 66MHz
-20 0% SPREAD
-30
4%
-40 SPREAD
-50
-60
-70
-80 2% SPREAD
-90
61
63 65 67 69
PCLK FREQUENCY (MHz)
71
MAXIMUM PCLK FREQUENCY vs.
ADDITIONAL DIFFERENTIAL CL (BER < 10-9)
120
10m STP CABLE
100
80
OPTIMUM
PE/EQ SETTINGS
60
40
NO PE, 10.7dB
EQUALIZATION
NO PE, 5.2dB EQUALIZATION
20
BER CAN BE AS LOW AS 10-12 FOR CL < 4pF
FOR OPTIMUM PE/EQ SETTINGS
0
0 2 4 6 8 10
ADDITIONAL DIFFERENTIAL LOAD CAPACITANCE (pF)
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MAX9263.PDF ] | |
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