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PDF SH68F83 Data sheet ( Hoja de datos )
| Número de pieza | SH68F83 | |
| Descripción | Low Speed USB Micro-controller | |
| Fabricantes | Sino Wealth | |
| Logotipo |  |
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SH68F83
Low Speed USB Micro-controller
Features
8-bit CMOS Micro-Processor (uP) core
- Instruction set is compatible with standard 8051
- Build-in 6MHz RC Oscillator for USB and MCU
Memory
- 16K Bytes Flash
- Support USB Self-Sectors-Programming (SSP)
- 256 bytes internal data memory
Operation voltage 4.4V - 5.25V
One set of Time Capture Circuit (Rising and Falling edge)
Build-in 32KHz oscillator for programmable wake up timer
3.3V regulator output
- Maximum driving current 20mA
Up to 37 general purpose I/O ports in 48 pin QFN package
Interrupt
- 11 vectors interrupt structure
- 2 programmable priority levels
Two 8-Bit auto-reloadable Base Timer
USB Specification Compliance
- Complies with USB specification 1.1
- Support one Low-Speed USB Device Address with
- 3 endpoints (endpoint 0, 1, and 2)
- Built-in 1.5Kohms USB pull-up resistor
Built-in Watch Dog Timer (WDT)
Two blue LED port
Reset
- Hardware reset
- External reset, Power-on reset, Low-voltage reset
- USB reset
- Watch-Dog reset
- Resume reset
Two power-reducing modes:
- Idle mode
- Power-Down mode
Package:
- 52 pad Chip Form
- 48 pin QFN (6 X 6)
General Description
The SH68F83 is designed for high performance, high integrated Low-speed USB devices and capable of USB
In-System-Programming. It contains an 8051 micro-controller, Low-Speed USB SIE, Transceiver and data FIFO, build-in 3.3V
regulator, on-chip 16K bytes program memory and internal 256 bytes data memory, Two 8-Bit auto-reloadable Base Timer,
programmable Watch-dog timer and Wake-up timer, 37 selectable GPIO in 48 pin QFN package, build-in 6MHz oscillator to
eliminate external crystal, POR and LVR circuit saving your external components cost. The SH68F83 is a highly integrated MCU
designed for cost effective applications. Application can cover such items as Keyboards and others.
1 V1.0
1 page  
SH68F83
Functional Description
1. Memory
1.1. Memory Allocation
There are 16K bytes Program Memory and 256 bytes Data Memory. These features are described as followed.
1.2. Program Memory
The SH68F83 embeds 16K Bytes (0000H - 3FFFH) on-chip program memory for program code. The flash program memory
provides electrical erasure and programming.
1.3. Data Memory
The SH68F83 provides additional Bytes of RAM space for increased data parameter handling, high level language usage. The
SH68F83 has internal data memory that is mapped into three separate segments.
The Three segments are:
1. The Lower 128 bytes of RAM (addresses 00H to 7FH) are directly and indirectly addressable.
2. The Upper 128 bytes of RAM (addresses 80H to FFH) are indirectly addressable only.
3. The Special Function Registers (SFR, addresses 80H to FFH) are directly addressable only.
The Upper 128 bytes of RAM occupy the same address space as SFR, but they are physically separate from SFR space. When
an instruction accesses an internal location above address 7Fh, the CPU can distinguish whether to access the upper 128 bytes
data RAM or to access SFR by different addressing mode of the instruction. Note the unused address is unavailable in SFR.
The Internal RAM configuration is shown as below:
0xFFFF
0x4000
Program Memory
(FLASH ROM)
RESERVED
Data Memory
(Internal SRAM)
0xFF
Upper 128 Bytes
(Indirect
Addressing Only)
Special Function
Register Area
(Direct Addressing
Only)
0x0000
16K Bytes Flash ROM
For User's Code Segment
0x80
0x7F
Direct and Indirect
Addressing Area
0x20
0x1F General Purpose
0x00 Registers
Figure 1-1. SH68F83 Program/Data Memory Map
Low 128 Bytes
Direct and Indirect
Addressing Ares
5
5 Page 
3.3. Instruction Set List
ADD
ADDC
SUBB
INC
DEC
MUL
DIV
DA
Opcode
A, Rn
A, @Ri
A, direct
A, #data
A, Rn
A, @Ri
A, direct
A, #data
A, Rn
A, @Ri
A, direct
A, #data
A
Rn
@Ri
DPTR
direct
A
Rn
@Ri
direct
AB
AB
A
CLR
CPL
ANL
ORL
XRL
Opcode
A
A
A, Rn
A, @Ri
A, direct
A, #data
direct, A
direct, #data
A, Rn
A, @Ri
A, direct
A, #data
direct, A
direct, #data
A, Rn
A, @Ri
A, direct
A, #data
direct, A
direct, #data
SH68F83
Arithmetic Instructions
Bytes
1
1
2
2
1
1
2
2
1
1
2
2
1
1
1
1
2
1
1
1
2
1
1
1
1
1
Cycles
1
2
2
2
1
2
2
2
1
2
2
2
1
2
3
4
3
1
2
3
3
11
20
11
20
1
Meaning
Add reg to acc
Add indir byte to acc
Add dir byte to acc
Add imm. Data to acc
Add reg to acc with carry flag
Add indir byte to acc with carry flag
Add dir byte to acc with carry flag
Add imm. Data to acc with carry flag
Subtract reg from acc with borrow
Subtract indir byte from acc with borrow
Subtract dir byte from acc with borrow
Subtract imm. Data from acc with borrow
Increment acc
Increment reg
Increment indir byte
Increment data pointer
Increment dir byte
Decrement acc
Decrement reg
Decrement indir byte
Decrement dir byte
Multiply A and B, 8-bit
Multiply (AUXC A) and B, 16-bit
Divide A by B, 8-bit
Divide (AUXC A) by B, 16-bit
Decimal adjust acc
Logical Instructions
Bytes Cycles
Meaning
11
Clear acc
1 1 Complement acc
1 1 AND register to acc
1 2 AND indir byte to acc
2 2 AND dir byte to acc
2 2 AND imm. Data to acc
2 3 AND acc to dir byte
3 3 AND imm. Data to dir byte
1 1 OR reg to acc
1 2 OR indir byte to acc
2 2 OR dir byte to acc
2 2 OR imm. Data to acc
2 3 OR acc to dir byte
3 3 OR imm. Data to dir byte
1 1 Exclusive-OR reg to acc
1 2 Exclusive-OR indir byte to acc
2 2 Exclusive-OR dir byte to acc
2 2 Exclusive-OR imm. Data to acc
2 3 Exclusive-OR acc to dir byte
3 3 Exclusive-OR imm. Data to dir byte
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SH68F83.PDF ] | |
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