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PDF DSC2032 Data sheet ( Hoja de datos )

Número de pieza DSC2032
Descripción Low-Jitter Configurable LVDS-LVPECL Oscillator
Fabricantes Micrel 
Logotipo Micrel Logotipo



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DSC2032
Low-Jitter Configurable LVDS-LVPECL Oscillator
General Description
The DSC2032 series of high performance
dual output oscillators utilize a proven silicon
MEMS technology to provide excellent jitter
and stability while incorporating additional
device functionality. The two outputs are
controlled by separate supply voltages to
allow for high output isolation. The
frequencies of the outputs can be identical or
independently derived from a common PLL
frequency source. The DSC2032 has
provision for up to eight user-defined pre-
programmed, pin selectable output frequency
combinations.
DSC2032 is packaged in a 14-pin 3.2x2.5
mm QFN package and available in
temperature grades from Ext. Commercial to
Industrial.
Block Diagram
Features
Low RMS Phase Jitter: <1 ps (typ)
High Stability: ±10, ±25, ±50 ppm
Wide Temperature Range
o Industrial: -40° to 85° C
o Ext. commercial: -20° to 70° C
High Supply Noise Rejection: -50 dBc
Two Independent Outputs
o LVPECL & LVDS
Pin-Selectable Configurations
o 3-bit Output Frequency Combinations
Wide Freq. Range
o LVPECL Output: 2.3 460 MHz
o LVDS Output: 2.3 460 MHz
Miniature Footprint of 3.2x2.5mm
Excellent Shock & Vibration Immunity
o Qualified to MIL-STD-883
High Reliability
o 20x better MTF than quartz oscillators
Supply Range of 2.25 to 3.6 V
Lead Free & RoHS Compliant
Applications
Storage Area Networks
o SATA, SAS, Fibre Channel
Passive Optical Networks
o EPON, 10G-EPON, GPON, 10G-PON
Ethernet
o 1G, 10GBASE-T/KR/LR/SR, and FCoE
HD/SD/SDI Video & Surveillance
PCI Express
_____________________________________________________________________________________________________________________________ _________________
DSC2032
Page 1
MK-Q-B-P-D-12042608-2

1 page




DSC2032 pdf
DSC2032
Low-Jitter Configurable LVDS-LVPECL Oscillator
Nominal Performance Parameters (Unless specified otherwise: T=25° C, VDD=3.3 V)
2.5 2.5
156MHz-LVDS
156MHz LVPECL
2.0
212MHz-LVDS
2.0
212MHz LVPECL
320MHz-LVDS
320MHz LVPECL
1.5
410MHz-LVDS
1.5
410MHz LVPECL
1.0 1.0
0.5
0.0
0
200 400 600 800 1000
Low-end of integration BW: x kHz to 20 MHz
LVDS Phase jitter (integrated phase noise)
0.5
Phas e Jitter ( ps RM S)
0.0
0
200 400 600 800 1000
Low-end of integration BW: x kHz to 20 MHz
LVPECL Phase jitter (integrated phase noise)
Output Waveform: LVDS
Output
Output
80%
50%
20%
tR
tF
1/f o
Enable
VIL
tEN
tDA
VIH
833500mmvV
Output Waveform: LVPECL
tR tF
Output
Output
80%
50%
20%
1/f o
Enable
VIL
tEN
tDA
VIH
830 mv
_____________________________________________________________________________________________________________________________ _________________
DSC2032
Page 5
MK-Q-B-P-D-12042608-2

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