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PDF AS6C2008A Data sheet ( Hoja de datos )
| Número de pieza | AS6C2008A | |
| Descripción | 256K X 8 BIT LOW POWER CMOS SRAM | |
| Fabricantes | Alliance Semiconductor | |
| Logotipo |  |
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JAaUnGuUarSyT22000077
AS6C2008A
256K X 8 BIT LOW51PO2KWEXR 8CMBOITS SLROAMW POWER CMOS SRAM
FEATURES
Fast access time : 55ns
Low power consumption:
Operating current : 20/18mA (TYP.)
Standby current : 2µA (TYP.)
Single 2.7V ~ 5.5V power supply
All outputs TTL compatible
Fully static operation
Tri-state output
Data retention voltage : 2.0V (MIN.)
Lead free and green package available
Package : 32-pin 8mm x 20mm TSOP-I
32-pin 8mm x 13.4mm STSOP
32-pin 450 mil SOP
32-pin 600 mil P-DIP
36-ball 6mm x 8mm TFBGA
PRODUCT FAMILY
Product
Family
AS6C2008A(LLI)
Operating
Temperature
-40 ~ 85℃
Vcc Range
2.7 ~ 5.5V
GENERAL DESCRIPTION
The AS6C2008A is a 2,097,152-bit low power
CMOS static random access memory organized as
262,144 words by 8 bits. It is fabricated using very
high performance, high reliability CMOS technology.
Its standby current is stable within the range of
operating temperature.
The AS6C2008A is well designed for very low power
system applications, and particularly well suited for
battery back-up nonvolatile memory application.
The AS6C2008A operates from a single power
supply of 2.7V ~ 5.5V and all outputs are fully TTL
compatible
Speed
55ns
Power Dissipation
Standby(ISB1,TYP.) Operating(Icc,TYP.)
2µA(LL)
20/18mA
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
A0-A17
DECODER
256Kx8
MEMORY ARRAY
DQ0-DQ7
CE#
CE2
WE#
OE#
I/O DATA
CIRCUIT
CONTROL
CIRCUIT
COLUMN I/O
PIN DESCRIPTION
SYMBOL
A0 - A17
DQ0 – DQ7
CE#, CE2
WE#
OE#
VCC
VSS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Inputs
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
AUGUST/2007, V 1.0
Alliance Memory Inc.
Page 1 of 15
1 page  
JAaUnGuUarSyT22000077
AS6C2008A
256K X 8 BIT LOW51PO2KWEXR 8CMBOITS SLROAMW POWER CMOS SRAM
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
SYM. AS6C2008A-55
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
tRC
tAA
tACE
tOE
tCLZ
tOLZ
tCHZ
tOHZ
tOH
(2) WRITE CYCLE
PARAMETER
SYM.
AS6C2008A-55
Write Cycle Time
tWC
Address Valid to End of Write
tAW
Chip Enable to End of Write
tCW
Address Set-up Time
tAS
Write Pulse Width
tWP
Write Recovery Time
tWR
Data to Write Time Overlap
tDW
Data Hold from End of Write Time tDH
Output Active from End of Write
tOW
Write to Output in High-Z
tWHZ
*These parameters are guaranteed by device characterization, but not production tested.
UNIT
UNIT
AUGUST/2007, V 1.0
Alliance Memory Inc.
Page 5 of 15
5 Page 
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PIN MIL 3/0 0ACKAGE /UTLINE $IMENSION
SYM. UNIT INCH.(BASE)
MM(REF)
A 0.118 (MAX) 2.997 (MAX)
A1 0.004(MIN) 0.102(MIN)
A2 0.111(MAX) 2.82(MAX)
b 0.016(TYP) 0.406(TYP)
c 0.008(TYP) 0.203(TYP)
D 0.817(MAX) 20.75(MAX)
E 0.445 0.005 11.303 0.127
E1 0.555 0.012 14.097 0.305
e 0.050(TYP) 1.270(TYP)
L 0.0347 0.008 0.881 0.203
L1 0.055 0.008 1.397 0.203
S 0.026(MAX) 0.660 (MAX)
y 0.004(MAX) 0.101(MAX)
/ 0o -10o
0o -10o
!5'534 6
!LLIANCE -EMORY )NC
0AGE OF
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| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet AS6C2008A.PDF ] | |
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