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PDF AD5590 Data sheet ( Hoja de datos )
| Número de pieza | AD5590 | |
| Descripción | 16 Output Analog I/O Port | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Input channels
12-bit successive approximation ADC
16 inputs with sequencer
Fast throughput rate: 1 MSPS
Wide input bandwidth: 70 dB SNR at fIN = 50 kHz
Output channels
16 outputs with 12-bit DACs
On-chip 2.5 V reference
Hardware LDAC and LDAC override function
CLR function to programmable code
Rail-to-rail operation
Operational amplifiers
16 Input, 16 Output Analog I/O Port
with Integrated Amplifiers
AD5590
Offset voltage: 2.2 mV maximum
Low input bias current: 1 pA maximum
Single supply operation
Low noise: 22 nV/√Hz
Unity gain stable
Flexible serial interface
SPI-/QSPI-/MICROWIRE-/DSP-compatible
−40°C to +85°C operation
APPLICATIONS
Optical line cards
Base stations
General-purpose analog I/O
Monitoring and control
FUNCTIONAL BLOCK DIAGRAM
ADCVDD DACVDD (×2)
V1+ V2+ V1– V2– VREFIN1/VREFOUT1
DSCLK
DSYNC1
DSYNC2
DDIN
LDAC
CLR
POWER-ON
RESET
DAC
INTERFACE
LOGIC
LDAC
INPUT
REGISTER
DAC
REGISTER
POWER-DOWN
1.25V/2.5V
LOGIC
REF
STRING
DAC 0
BUFFER
VOUT0
INPUT
REGISTER
DAC
REGISTER
STRING
DAC 7
BUFFER
VOUT7
INPUT
REGISTER
DAC
REGISTER
STRING
DAC 8
BUFFER
VOUT8
VDRIVE
ASCLK
ASYNC
ADIN
ADOUT
INPUT
REGISTER
DAC
REGISTER
STRING
DAC 15
ADC
INTERFACE
LOGIC
1.25V/2.5V
REF
SEQUENCER
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
IN0(–) IN0(+)
OUT0 IN7(–) IN7(+)
OUT7 DACGND (×2)
Figure 1.
BUFFER
VOUT15
POWER-DOWN
LOGIC
VREFIN2/VREFOUT2
VIN0
T/H
INPUT
MUX
AD5590
ADCGND
VINI5
VREFA
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
1 page  
AD5590
Parameter
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN1, 4
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating State Leakage Current
Floating State Output Capacitance4
Output Coding
CONVERSION RATE4
Conversion Time
Track-and-Hold Acquisition Time3
Throughput Rate
POWER REQUIREMENTS
ADCVDD
VDRIVE
IDRIVE
IDD 5
Normal Mode, Static
Normal Mode, Operational
(fS = Maximum Throughput)
Autostandby Mode
Autoshutdown Mode
Full Shutdown Mode
Power Dissipation
Normal Mode, Operational
Autostandby Mode, Static
Autoshutdown Mode, Static
Full Shutdown Mode
Min Typ
Max Unit Test Conditions/Comments2
0.7 × VDRIVE
−1
0.3 × VDRIVE
+1
10
V
V
μA
pF
Typically 10 nA
VDRIVE − 0.2
0.4
±10
10
Straight (Natural) Binary
Twos Complement
V ISOURCE = 200 μA; VDD = 2.7 V to 5.25 V
V ISINK = 200 μA
μA weak/TRI bit set to 0
pF weak/TRI bit set to 0
coding bit set to 1
coding bit set to 0
800 ns 16 ASCLK cycles, ASCLK = 20 MHz
300 ns Sine wave input
300 ns Full-scale step input
1 MSPS @ 5 V (see the Serial Interface section)
2.7
2.7
750
1.55
960
0.02
5.25 V
5.25 V
0.15 μA
Digital inputs = 0 V or VDRIVE
μA VDD = 4.75 V to 5.25 V, ASCLK on or off
2.5 mA VDD = 4.75 V to 5.25 V, fSCLK = 20 MHz
mA fSAMPLE = 500 kSPS
100 μA Static
μA fSAMPLE = 250 kSPS
0.5 μA Static
0.5 μA ASCLK on or off
12.5 mW ADCVDD = 5 V, fSCLK = 20 MHz
500 μW ADCVDD = 5 V
2.5 μW ADCVDD = 5 V
2.5 μW ADCVDD = 5 V
1 Specifications apply for fSCLK up to 20 MHz. For serial interfacing requirements, see the Timing Specifications section.
2 Temperature range: −40°C to +85°C.
3 See the Terminology section.
4 Guaranteed by design and characterization. Not production tested.
5 See the ADC Power vs. Throughput Rate section.
Rev. 0 | Page 5 of 44
5 Page 
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise noted. VDD refers to DACVDD or
ADCVDD. GND refers to DACGND or ADCGND.
Table 7.
Parameter
VDD to GND
VDRIVE to GND
Op Amp Supply Voltage
Op Amp Input Voltage
Op Amp Differential Input Voltage
Op Amp Output Short-Circuit
Duration to GND
Analog Input Voltage to GND
Digital Input Voltage to GND
Digital Output Voltage to GND
VREFA to GND
VREFIN/VREFOUT to GND
Input Current to Any ADC Pin
Except Supplies
Operating Temperature Range
Storage Temperature Range
Junction Temperature (TJ max)
Rating
−0.3 V to +7 V
−0.3 V to VDD + 0.3 V
6V
(V1− or V2−) − 0.3 V to
(V1+ or V2+) + 0.3 V
±6 V
Indefinite
−0.3 V to VDD + 0.3 V
−0.3 V to +7 V
−0.3 V to VDD +0.3 V
−0.3 V to VDD +0.3 V
−0.3 V to VDD +0.3 V
±10 mA
−40°C to +85°C
−65°C to +150°C
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
AD5590
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a 4-layer JEDEC thermal test board for surface-
mount packages.
Table 8. Thermal Resistance
Package Type
80-Ball CSP_BGA
θJA Unit
40 °C/W
Table 9. Junction Temperature
Parameter
Max
Junction Temperature1, 2 130
Unit
°C
Comments
TJ = TA + PTOTAL × θJA
1 PTOTAL is the sum of ADC, DAC, and operational amplifier supply currents.
2 θJA is the package thermal resistance.
ESD CAUTION
Rev. 0 | Page 11 of 44
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD5590.PDF ] | |
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