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PDF CY25566 Data sheet ( Hoja de datos )

Número de pieza CY25566
Descripción Spread Spectrum Clock Generator
Fabricantes Cypress Semiconductor 
Logotipo Cypress Semiconductor Logotipo



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CY25566
Spread Spectrum Clock Generator
Features
• 25- to 200-MHz operating frequency range
• Wide range of spread selections (9)
• Accepts clock or crystal inputs
• Provides four clocks
— SSCLK1a
— SSCLK1b
— SSCLK2
— REFOUT
• Low-power dissipation
— 3.3V = 70 mW (typical @ 40 MHz, no load)
Block Diagram
• Center spread modulation
• Low cycle-to cycle jitter
• 16-pin SOIC package
Applications
• High-resolution VGA controllers
• LCD panels and monitors
• Printers and MFPs
Benefits
• Peak EMI reduction by 8 to 16 dB
• Fast time to market
Cost reduction
Pin Configuration
Xin/
CLK
1
Xout 16
VDD 4
VSS 5
VSS 11
VSS 14
REFOFF
2
300K 3 REFOUT XIN/CLKIN 1
REFERENCE
DIVIDER
PD CP
Loop
Filter
REFOFF 2
REFOUT 3
VDD 4
MODULATION
CONTROL
FEEDBACK
DIVIDER
vco
INPUT
DECODER
LOGIC
VDD VDD
DIVIDER
&
MUX
8 SSCLK1a
VSS 5
S2 6
S3
SSCLK1a
7
8
9 SSCLK1b
20 K
10
SSCC
20 K
VSS
12 13
S1 S0
20 K
20 K
VSS
RANGE
CONTROL
67
S2 S3
/2 15 SSCLK2
16 XOUT
15 SSCLK2
14 VSS
13 S0
12 S1
11 VSS
10 SSCC
9 SSCLK1b
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
www.DDaotacSuhmeeet4nUt .#n:et38-07429 Rev. *B
Revised October 26, 2005

1 page




CY25566 pdf
CY25566
Table 1. Frequency and Bandwidth Selection Chart (Group 1)(Low Frequency (1x) Selection Chart)
XIN/CLK
(MHz)
25–35
35–40
40–45
45–50
S1 = M
S0 = M
4.3
3.9
3.7
3.4
25–50 MHz (Low Range)
S1 = M
S0 = 0
S1 = 1
S0 = 0
3.8 3.4
3.5 3.1
3.3 2.8
3.1 2.6
50–100 MHz (High Range)
S1 = 0
S0 = 0
2.9
2.5
2.4
2.2
S1 = 0
S0 = M
2.8
2.4
2.3
2.1
S3 S2
00
XIN/CLK
(MHz)
50–60
60–70
70–80
80–100
S1 = 1
S0 = M
2.9
2.8
2.6
2.4
S1 = 0
S0 = 1
2.1
2.0
1.8
1.7
S1 = 1
S0 = 1
1.5
1.4
1.3
1.2
S1 = M
S0 = 1
1.2
1.1
1.1
1.0
S3 S2
00
Table 2. Frequency and Bandwidth Selection Chart (Group 2)(High Frequency (1x) Selection Chart)
50–100 MHz (Low Range)
XIN/CLK
(MHz)
S1 = M
S0 = M
S1 = M
S0 =0
S1 = 1
S0 = 0
S1 = 0 S1 = 0
S0 = 0 S0 = M
50–60
4.2
3.8
3.2 2.8 2.7
60–70
4.0
3.6
3.1 2.6 2.5
70–80
80–100
3.8 3.4 2.9
3.5 3.1 2.7
100–200 MHz (High Range)
2.5 2.4
2.2 2.1
S3 S2
10
XIN/CLK
(MHz)
S1 = 1
S0 = M
S1 = 0
S0 = 1
S1 = 1
S0 = 1
S1 = M
S0 = 1
100–120
3.0
2.4
1.6
1.3
120–130
2.7
2.1
1.4
1.1
130–140
2.6
2.0
1.3
1.1
140–150
2.6
2.0
1.3
1.1
150–160
2.5
1.8
1.2
160–170
2.4
1.8
1.2
170–180
2.4
1.8
1.2
1.0
1.0
1.0
S3 S2
10
180–190
2.3
1.7
1.1
0.9
190–200
2.3
1.6
1.1
0.9
Table 3. Frequency and Bandwidth Selection Chart (Group 3)(Low Frequency (2x) Selection Chart)
25–50 MHz (Low Range, 2X)
XIN/CLK
(MHz)
SSCLK1
(MHz)
S1 = M
S0 = M
S1 = M
S0 = 0
S1 = 1 S1 = 0 S1 = 0
S0 = 0 S0 = 0 S0 = M
25–35
50-70
4.0
3.5
3.0 2.6 2.5
35–40
70-80
3.8
3.3
2.9 2.4 2.3
40–45
80-90
3.5
3.1
2.7 2.2 2.1
45–50
90-100
3.3
2.9
2.5 2.1 2.0
S3 S2
01
Document #: 38-07429 Rev. *B
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