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Número de pieza | CY25562 | |
Descripción | Spread Spectrum Clock Generator | |
Fabricantes | Cypress Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de CY25562 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
No Preview Available ! CY25562
Spread Spectrum Clock Generator
Features
■ 50 to 200 MHz Operating Frequency Range
■ Wide range of spread selections: 9
■ Accepts Clock and Crystal Inputs
■ Low Power Dissipation
❐ 70 mW Typ (Fin = 65 MHz)
■ Frequency Spread Disable Function
■ Center Spread Modulation
■ Low Cycle-to-cycle Jitter
■ 8-pin SOIC Package
Logic Block Diagram
Xin/
CLK
1
Xout 8
VDD 2
VSS 3
Applications
■ High resolution VGA controllers
■ LCD panels and monitors
■ Workstations and servers
Benefits
■ Peak EMI reduction by 8 to 16 dB
■ Fast time to market
■ Cost reduction
300K
REFERENCE
DIVIDER
PD CP
Loop
Filter
MODULATION
CONTROL
FEEDBACK
DIVIDER
vco
INPUT
DECODER
LOGIC
VDD
20 K
VDD
20 K
20 K
5
SSCC
VSS
67
S1 S0
20 K
VSS
DIVIDER
&
MUX
4 SSCLK
Cypress Semiconductor Corporation • 198 Champion Court
wwwD.DocautamSheenett4NUu.nmebt er: 38-07392 Rev. *C
• San Jose, CA 95134-1709 • 408-943-2600
Revised September 15, 2008
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1 page Part Number Application Schematic
Figure 4. Application Schematic
VDD
C3 0.1 uF
1 XIN/CLK
200 MHz Reference Clock
2
VDD
8 XOUT
4
SSCLK
CY25562
VDD
5
SSCC
VSS
3
6
S1
7
S0
VDD
CY25562
The schematic in Figure 4 demonstrates how CY25562 is configured in a typical application. This application is using a 200 MHz
reference clock connected to pin 1. Because an external reference clock is used, pin 8 (Xout) is left unconnected.
This configuration depicts the profile and spectrum scans shown in Figure 3. Note that S0=S1=1, for a spread of approximately 1.1
percent.
Document Number: 38-07392 Rev. *C
Page 5 of 8
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5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet CY25562.PDF ] |
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