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PDF CY62136VN Data sheet ( Hoja de datos )
| Número de pieza | CY62136VN | |
| Descripción | 2-Mbit (128K x 16) Static RAM | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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CY62136VN MoBL®
2-Mbit (128K x 16) Static RAM
Features
• Temperature Ranges
— Industrial: –40°C to 85°C
— Automotive-A: –40°C to 85°C
— Automotive-E: –40°C to 125°C
• High speed: 55 ns
• Wide voltage range: 2.7V–3.6V
• Ultra-low active, standby power
• Easy memory expansion with CE and OE features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Available in standard Pb-free 44-pin TSOP Type II,
Pb-free and non Pb-free 48-ball FBGA packages
Functional Description[1]
The CY62136VN is a high-performance CMOS static RAM
organized as 128K words by 16 bits. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life™ (MoBL®) in
Logic Block Diagram
DATA IN DRIVERS
A10
A9
A8
A7
A6
A5 128K x 16
A4 RAM Array
A3
A2
A1
A0
COLUMN DECODER
portable applications such as cellular telephones. The device
also has an automatic power-down feature that significantly
reduces power consumption by 99% when addresses are not
toggling. The device can also be put into standby mode when
deselected (CE HIGH). The input/output pins (I/O0 through
I/O15) are placed in a high-impedance state when: deselected
(CE HIGH), outputs are disabled (OE HIGH), BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is
written into the location specified on the address pins (A0
through A16). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O8 through I/O15) is written into the location
specified on the address pins (A0 through A16).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O8 to I/O15. See
the Truth Table at the back of this data sheet for a complete
description of read and write modes.
I/O0 – I/O7
I/O8 – I/O15
BHE
WE
CE
OE
BLE
PinConfigurations[3]
TSOP II (Forward)
Top View
A4
A3
A2
A1
A0
CE
I/O 0
I/O 1
I/O 2
I/O 3
VCC
VSS
I/O 4
I/O 5
I/O 6
I/O 7
WE
A 16
A 15
A 14
A 13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44 A5
43 A6
42 A7
41 OE
40 BHE
39 BLE
38 I/O 15
37 I/O 14
36 I/O 13
35 I/O 12
34 VSS
33 VCC
32 I/O 11
31 I/O 10
30 I/O 9
29 I/O 8
28 NC
27 A8
26 A9
25 A10
24 A11
23 NC
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 001-06510 Rev. *A
Revised August 3, 2006
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CY62136VN MoBL®
Switching Characteristics Over the Operating Range [9]
55 ns
70 ns
Parameter
Description
Min.
Max.
Min.
Max.
Unit
Read Cycle
tRC
tAA
tOHA
tACE
tDOE
tLZOE
tHZOE
tLZCE
tHZCE
tPU
tPD
tDBE
tLZBE
tHZBE
Write Cycle[12, 13]
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low-Z[10]
OE HIGH to High-Z[10, 11]
CE LOW to Low-Z[10]
CE HIGH to High-Z[10, 11]
CE LOW to Power-up
CE HIGH to Power-down
BLE / BHE LOW to Data Valid
BLE / BHE LOW to Low-Z[10, 11]
BLE / BHE HIGH to High-Z[12]
55 70 ns
55 70 ns
10 10 ns
55 70 ns
25 35 ns
5 5 ns
25 25 ns
10 10 ns
25 25 ns
0 0 ns
55 70 ns
25 35 ns
5 5 ns
25 25 ns
tWC Write Cycle Time
55 70 ns
tSCE
CE LOW to Write End
45
60 ns
tAW Address Set-up to Write End
45
60 ns
tHA Address Hold from Write End 0
0 ns
tSA Address Set-up to Write Start 0
0 ns
tPWE
WE Pulse Width
40 50 ns
tBW BLE / BHE LOW to Write End 50
60 ns
tSD Data Set-up to Write End
25
30 ns
tHD
tHZWE
tLZWE
Data Hold from Write End
WE LOW to High-Z[10, 11]
WE HIGH to Low-Z[10]
0 0 ns
20 25 ns
5 10 ns
Notes:
9. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to VCC typ., and output loading of the specified
IOL/IOH and 30-pF load capacitance.
10. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device.
11. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
12. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can
terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
13. The minimum write cycle time for write cycle 3 (WE controlled, OE LOW) is the sum of tHZWE and tSD.
Document #: 001-06510 Rev. *A
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CY62136VN MoBL®
Package Diagrams (continued)
48-Ball (7.00 mm x 7.00 mm) FBGA (51-85096)
TOP VIEW
PIN 1 CORNER
(LASER MARK)
12 3 4 5 6
A
B
C
D
E
F
G
H
A
B 7.00±0.10
BOTTOM VIEW
Ø0.05 M C
Ø0.25 M C A B
Ø0.30±0.05(48X)
6 54321
PIN 1 CORNER
A
B
C
D
E
F
G
H
A
B
0.15(4X)
1.875
0.75
3.75
7.00±0.10
SEATING PLANE
C
1.20 MAX.
51-85096-*F
MoBL is a registered trademark, and More Battery Life is a trademark, of Cypress Semiconductor Corporation. All product and
company names mentioned in this document are the products of their respective holders.
Document #: 001-06510 Rev. *A
Page 11 of 12
© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
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