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Número de pieza | TPCP8102 | |
Descripción | Field Effect Transistor Silicon MOS Type | |
Fabricantes | Toshiba Semiconductor | |
Logotipo | ||
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TOSHIBA Field Effect Transistor Silicon P-Channel MOS Type (U-MOwSwwⅣ.D)ataSheet4U.com
TPCP8102
Notebook PC Applications
Portable Equipment Applications
• Small footprint due to small and thin package
• Low drain-source ON-resistance: RDS (ON) = 13.5 mΩ (typ.)
• High forward transfer admittance: |Yfs| = 24 S (typ.)
• Low leakage current: IDSS = -10 μA (max) (VDS = -20 V)
• Enhancement model: Vth = -0.45 to -1.2 V
(VDS = -10 V, ID = -200 μA)
Absolute Maximum Ratings (Ta = 25°C)
0.33±0.05
0.05 M A
85
Unit: mm
0.475
1
0.65
2.9±0.1
4
S
0.025 S
0.17±0.02
B 0.05 M B
A
0.8±0.05
0.28
+0.1
-0.11
Characteristic
Symbol
Rating
Unit
1.12+-00..1123
Drain-source voltage
Drain-gate voltage (RGS = 20 kΩ)
Gate-source voltage
Drain current
DC (Note 1)
Pulse (Note 1)
Drain power dissipation
(t = 5 s)
(Note 2a)
Drain power dissipation
(t = 5 s)
(Note 2b)
Single-pulse avalanche energy (Note 3)
Avalanche current
Repetitive avalanche energy (Note 4)
Channel temperature
Storage temperature range
VDSS
VDGR
VGSS
ID
IDP
PD
PD
EAS
IAR
EAR
Tch
Tstg
-20
-20
± 12
-7.2
-28.8
1.68
0.84
33.7
-7.2
0.168
150
-55~150
V
V
V
A
W
W
mJ
A
mJ
°C
°C
1. Source
2. Source
3. Source
4. Gate
1.12+-00..1123
0.28
+0.1
-0.11
5. Drain
6. Drain
7. Drain
8. Drain
JEDEC
⎯
JEITA
⎯
TOSHIBA
2-3V1K
Weight: 0.017 g (typ.)
Note: For Notes 1 to 5, refer to the next page.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate
reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and
Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
This transistor is an electrostatic-sensitive device. Handle with care.
Circuit Configuration
8765
Marking (Note 5)
8 76
5
1 2 34
8102
※
1 2 34
Lot No.
1 2006-11-17
1 page 60
Common source
Pulse test
50
RDS (ON) – Ta
40 −3.6 A
30 VGS = −2 V
ID = −7.2 A
−1.8 A
20
VGS = −2.5 V
10
VGS = −4.5 V
ID = −7.2 A, −3.6 A, −1.8 A
0
−80 −40
0
40 80 120 160
Ambient temperature Ta (°C)
TPCP8102
www.DataSheet4U.com
IDR – VDS
−100
−10 −10 −5 −3
−3 V
−1 VGS = 0 V
−1
−0.1
0
Common source
Ta = 25°C
Pulse test
−0.2
−0.4
−0.6
−0.8
−1.0
Drain−source voltage VDS (V)
−1.2
10000
C – VDS
1000
Ciss
Common source
Ta = 25°C
VGS = 0 V
f = 1 MHz
100
0.1
Coss
Crss
10
Drain−source voltage VDS (V)
100
2.0
(1)
1.6
1.2
(2)
0.8
PD – Ta
(1) Device mounted on a glass-epoxy
board (a) (Note 2a)
(2) Device mounted on a glass-epoxy
board (b) (Note 2b)
t=5s
0.4
0
0 40 80
160 200
Ambient temperature Ta (°C)
Vth – Ta
−1.2
Common source
−1.0
VDS = −10 V
ID = −200 μA
−0.8
Pulse test
−0.6
−0.4
−0.2
0
−80 −40
0
40 80 120 160
Ambient temperature Ta (°C)
Dynamic input/output
characteristics
−20 −8
VDD = −16 V
−15
VDS
−10
−8
−8
−4
−6
VDD = −16 V −4
−5 −4
0
0
VGS
Common source −2
ID = 7.2 A
Ta = 25°C
Pulse test
0
10 20 30 40
Total gate charge Qg (nC)
5 2006-11-17
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet TPCP8102.PDF ] |
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