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PDF TPCP8002 Data sheet ( Hoja de datos )
| Número de pieza | TPCP8002 | |
| Descripción | Field Effect Transistor Silicon MOS Type | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
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TPCP8002
TOSHIBA Field Effect Transistor Silicon N-Channel MOS Type (U-MOwwSwI.VD)ataSheet4U.com
TPCP8002
Notebook PC Applications
Portable Equipment Applications
• Lead (Pb)-Free
• Small footprint due to small and thin package
• Low drain-source ON-resistance
: RDS (ON) = 7 mΩ (typ.)
• High forward transfer admittance
:|Yfs| = 36 S (typ.)
• Low leakage current
: IDSS = 10 μA (VDS = 20 V)
• Enhancement mode
: Vth = 0.5 to 1.2 V (VDS = 10 V, ID = 0.2 mA)
0.33±0.05
0.05 M A
85
Unit: mm
0.475
1
0.65
2.9±0.1
4
S
0.025 S
0.17±0.02
B 0.05 M B
A
0.8±0.05
0.28
+0.1
-0.11
Absolute Maximum Ratings (Ta = 25°C)
Characteristic
Symbol
Rating
Unit
Drain-source voltage
Drain-gate voltage (RGS = 20 kΩ)
Gate-source voltage
DC
Drain current
Pulse
(Note 1)
(Note 1)
Drain power dissipation (t = 5 s)
(Note 2a)
Drain power dissipation (t = 5 s)
(Note 2b)
VDSS
VDGR
VGSS
ID
IDP
PD
PD
20
20
±12
9.1
36.4
1.68
0.84
V
V
V
A
W
Single pulse avalanche energy
(Note 3)
Avalanche current
Repetitive avalanche energy
(Note 4)
Channel temperature
Storage temperature range
EAS 21.5 mJ
IAR 9.1 A
EAR
0.168
mJ
Tch 150 °C
Tstg
−55~150
°C
Note: For Notes 1 to 5, refer to the next page.
Using continuously under heavy loads (e.g. the application of high
temperature/current/voltage and the significant change in temperature,
etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage,
etc.) are within the absolute maximum ratings. Please design the
appropriate reliability upon reviewing the Toshiba Semiconductor
Reliability Handbook (“Handling Precautions”/Derating Concept and
Methods) and individual reliability data (i.e. reliability test report and
estimated failure rate, etc).
This transistor is an electrostatic-sensitive device. Handle with care.
1.12+-00..1132
1.12+-00..1132
1．Source
2．Source
3．Source
4．Gate
5．Drain
6．Drain
7．Drain
8．Drain
0.28 +-00..111
JEDEC
―
JEITA
―
TOSHIBA
2-3V1K
Circuit Configuration
8765
123
Marking (Note 5)
876
4
5
8002
*
1234
Lot No.
1 2007-01-16
1 page  
RDS (ON) – Ta
20
Common source
Pulse test
16
ID = 2.3,4.5,9.1 A
12
2.5 V
8
ID = 2.3,4.5,9.1 A
4 VGS = 4.5 V
0
−80 −40
0
40 80 120 160
Ambient temperature Ta (°C)
TPCP8002
www.DataSheet4U.com
100
5
10
3
IDR – VDS
Common source
Ta = 25°C
Pulse test
VGS = −1 V
1
1
0
0.1
0
−0.2
−0.4 −0.6
−0.8
−1 −1.2
Drain−source voltage VDS (V)
10000
C – VDS
Ciss
1000
Coss
Common source
VGS = 0 V
f = 1 MHz
100 Ta = 25°C
0.1 1
Crss
10
Drain−source voltage VDS (V)
100
2.0
(1)
1.6
1.2
(2)
0.8
PD – Ta
(1) Device mounted on a
glass-epoxy board (a)
(Note 2a)
(2) Device mounted on a
glass-epoxy board (b)
(Note 2b)
0.4
0
0 50 100 150 200
Ambient temperature Ta (°C)
Vth – Ta
1.2
1.0
0.8
0.6
0.4
Common source
0.2 VDS = −10 V
ID = −200 μA
Pulse test
0.0
−80 −40
0
40 80 120
Ambient temperature Ta (°C)
160
20
VDS
16
12
8
4
Dynamic input/output
characteristics
Common source
ID = 9.1 A
Ta = 25°C
Single Pulse test
10
8
8V
6
4V
VGS
VDD = 16 V
4
2
00
0 20 40 60
Total gate charge Qg (nC)
5 2007-01-16
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet TPCP8002.PDF ] | |
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