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PDF CYRF6936 Data sheet ( Hoja de datos )
| Número de pieza | CYRF6936 | |
| Descripción | WirelessUSB LP 2.4 GHz Radio SoC | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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CYRF6936
WirelessUSB™ LP 2.4 GHz Radio SoC
Features
• 2.4 GHz Direct Sequence Spread Spectrum (DSSS) radio
transceiver
• Operates in the unlicensed worldwide Industrial, Scientific
and Medical (ISM) band (2.400 GHz–2.483 GHz)
• 21 mA operating current (Transmit @ –5 dBm)
• Transmit power up to +4 dBm
• Receive sensitivity up to –97 dBm
• Sleep Current <1 μA
• Operating range: 10m+
• DSSS data rates up to 250 kbps, GFSK data rate of 1 Mbps
• Low external component count
• Auto Transaction Sequencer (ATS) - no MCU intervention
• Framing, Length, CRC16, and Auto ACK
• Power Management Unit (PMU) for MCU/Sensor
• Fast Startup and Fast Channel Changes
• Separate 16-byte Transmit and Receive FIFOs
• AutoRate™ - dynamic data rate reception
• Receive Signal Strength Indication (RSSI)
• Serial Peripheral Interface (SPI) control while in sleep mode
• 4 MHz SPI microcontroller interface
• Battery Voltage Monitoring Circuitry
• Supports coin-cell operated applications
• Operating voltage from 1.8V to 3.6V
• Operating temperature from 0 to 70°C
• Space saving 40-pin QFN 6x6 mm package
Applications
• Wireless Keyboards and Mice
• Wireless Gamepads
• Remote Controls
• Toys
• VOIP and Wireless Headsets
• White Goods
• Consumer Electronics
• Home Automation
• Automatic Meter Readers
• Personal Health and Entertainment
Applications Support
See www.cypress.com for development tools, reference
designs, and application notes.
Functional Description
The CYRF6936 WirelessUSB™ LP radio is a second gener-
ation member of Cypress’s WirelessUSB Radio
System-On-Chip (SoC) family. The CYRF6936 is interop-
erable with the first generation CYWUSB69xx devices. The
CYRF6936 IC adds a range of enhanced features, including
increased operating voltage range, reduced supply current in
all operating modes, higher data rate options, and reduced
crystal start up, synthesizer settling and link turnaround times.
CYRF6936 Simplified Block Diagram
IRQ
SS
SCK
MISO
MOSI
VIO VBAT
L/D
VREG
VDD VCC
PACTL
Power Management
SPI
Data
Interface
and
Sequencer
DSSS
Baseband
& Framer
RSSI
GFSK
Modulator
GFSK
Demodulator
RFP
RFN
RFBIAS
RST
Xtal Osc
Synthesizer
GND
Block Diagram
Cypress Semiconductor Corporation
Document #: 38-16015 Rev. *G
• 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Revised April 2, 2007
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CYRF6936
Table 2. Typical Range Observed Table
Environment
Typical Range (meters)
Outdoor
30
Office
20
Home
15
Note: Range observed with CY4636 WirelessUSB LP KBM v1.0 (Keyboard)
Frequency Synthesizer
Before transmission or reception may begin, the frequency
synthesizer must settle. The settling time varies depending on
channel; 25 fast channels are provided with a maximum
settling time of 100 μs.
The ‘fast channels’ (less than 100 μs settling time) are every
third channel, starting at 0 up to and including 72 (for example,
0, 3, 6, 9….69, 72).
Baseband and Framer
The baseband and framer blocks provide the DSSS encoding
and decoding, SOP generation and reception and CRC16
generation and checking, as well as EOP detection and length
field.
Packet Buffers and Radio Configuration Registers
Packet data and configuration registers are accessed through
the SPI interface. All configuration registers are directly
addressed through the address field in the SPI packet (as in
the CYWUSB6934). Configuration registers allow configu-
ration of DSSS PN codes, data rate, operating mode, interrupt
masks, interrupt status, and so on.
SPI Interface
The CYRF6936 IC has an SPI interface supporting communi-
cations between an application MCU and one or more slave
devices (including the CYRF6936). The SPI interface supports
single-byte and multi-byte serial transfers using either 4-pin or
3-pin interfacing. The SPI communications interface consists
of Slave Select (SS), Serial Clock (SCK), and Master
Out-Slave In (MOSI), Master In-Slave Out (MISO), or Serial
Data (SDAT).
The SPI communications are as follows:
• Command Direction (bit 7) = ‘1’ enables SPI write trans-
action. A ‘0’ enables SPI read transactions.
• Command Increment (bit 6) = ‘1’ enables SPI auto address
increment. When set, the address field automatically incre-
ments at the end of each data byte in a burst access,
otherwise the same address is accessed.
• Six bits of address.
• Eight bits of data.
The device receives SCK from an application MCU on the SCK
pin. Data from the application MCU is shifted in on the MOSI
pin. Data to the application MCU is shifted out on the MISO
pin. The active LOW Slave Select (SS) pin must be asserted
to initiate an SPI transfer.
The application MCU can initiate SPI data transfers using a
multi-byte transaction. The first byte is the Command/Address
byte, and the following bytes are the data bytes as shown in
Figure 4 through Figure 7 on page 6.
The SPI communications interface has a burst mechanism,
where the first byte can be followed by as many data bytes as
desired. A burst transaction is terminated by deasserting the
slave select (SS = 1).
The SPI communications interface single read and burst read
sequences are shown in Figure 5 and Figure 6, respectively.
The SPI communications interface single write and burst write
sequences are shown in Figure 7 and Figure 8, respectively.
This interface may optionally be operated in a 3-pin mode with
the MISO and MOSI functions combined in a single bidirec-
tional data pin (SDAT). When using 3-pin mode, user firmware
should ensure that the MOSI pin on the MCU is in a high
impedance state except when MOSI is actively transmitting
data.
The device registers may be written to or read from one byte
at a time, or several sequential register locations may be
written/read in a single SPI transaction using incrementing
burst mode. In addition to single byte configuration registers,
the device includes register files; register files are FIFOs
written to and read from using nonincrementing burst SPI
transactions.
The IRQ pin function may optionally be multiplexed onto the
MOSI pin; when this option is enabled the IRQ function is not
available while the SS pin is LOW. When using this configu-
ration, user firmware should ensure that the MOSI pin on the
MCU is in a high impedance state whenever the SS pin is
HIGH.
The SPI interface is not dependent on the internal 12 MHz
clock. Registers may therefore be read from or written to while
the device is in sleep mode, and the 12 MHz oscillator
disabled.
The SPI interface and the IRQ and RST pins have a separate
voltage reference pin (VIO), enabling the device to interface
directly to MCUs operating at voltages below the CYRF6936
IC supply voltage.
Document #: 38-16015 Rev. *G
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Table 4. Recommended Bill of Materials for Systems Where VBAT is 2.4V to 3.6V (PMU disabled)
Item Qty CY Part Number Reference
Description
Manufacturer
Mfr Part Number
1 1 NA
ANT1
2.5GHZ H-STUB WIGGLE ANTEN- NA
NA FOR 32MIL PCB
NA
2 1 730-10012
C1
CAP 15PF 50V CERAMIC NPO 0402 Panasonic
ECJ-0EC1H150J
3 1 730-11955
C3
CAP 2.0 PF 50V CERAMIC NPO
0402
Kemet
C0402C209C5GACTU
4 1 730-11398
C4
CAP 1.5PF 50V CERAMIC NPO
0402 SMD
PANASONIC
ECJ-0EC1H1R5C
5 1 730-13322
C5
CAP 0.47 uF 6.3V CERAMIC X5R Murata
0402
GRM155R60J474KE19D
6 6 730-13404
C6,C7,C8,C9, CAP 0.047 uF 16V CERAMIC X5R AVX
C10,C11
0402
0402YD473KAT2A
7 1 730-11953 C12 CAP 1500PF 50V CERAMIC X7R Kemet
0402
C0402C152K5RACTU
8 1 730-13040 C13 CAP CERAMIC 4.7UF 6.3V XR5 Kemet
0805
C0805C475K9PACTU
9 1 730-12003
C14
CAP CER 2.2UF 10V 10% X7R 0805 Murata Electronics
GRM21BR71A225KA01L
North America
10 1 800-13333
D1
LED GREEN/RED BICOLOR 1210 LITEON
SMD
LTST-C155KGJRKT
11 1 420-13046
J1
CONN USB PLUG TYPE A PCB SMT ACON
UAR72-4N5J10
12 1 800-13401
L1
INDUCTOR 22NH 2% FIXED 0603 Panasonic - ECG
SMD
ELJ-RE22NGF2
13 1 800-11651
L2
INDUCTOR 1.8NH +-.3NH FIXED Panasonic - ECG
0402 SMD
ELJ-RF1N8DF
14 1 610-10343
R1
RES ZERO OHM 1/16W 0402 SMD Panasonic - ECG
ERJ-2GE0R00X
15 1 610-13472
R2
RES CHIP 620 OHM 1/16W 5% 0402 Panasonic - ECG
SMD
ERJ-2GEJ621X
16 1 200-13471
S1
SWITCH LT 3.5MMX2.9MM 160GF Panasonic - ECG
SMD
EVQ-P7J01K
17 1 CYRF6936-40LFC U1
IC, LP 2.4 GHz RADIO SoC QFN-40 Cypress Semiconductor CYRF6936 Rev A5
18 1 CY7C63803-SXC U2
IC LOW-SPEED USB ENCORE II Cypress Semiconductor CY7C63803-SXC
CONTROLLER SOIC16
19 1 800-13259
Y1
CRYSTAL 12.00MHZ HC49 SMD eCERA
GF-1200008
20 1 PDC-9263-*B
PCB
PRINTED CIRCUIT BOARD
Cypress Semiconductor PDC-9263-*B
21 1
LABEL1
Serial Number
XXXXXX
22 1
LABEL2
PCA #
121-26305 **
Document #: 38-16015 Rev. *G
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