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Número de pieza | MSM54V32128 | |
Descripción | (MSM54V32126 / MSM54V32128) DYNAMIC RAM | |
Fabricantes | OKI electronic | |
Logotipo | ||
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¡¡SemicondSucetormiconductor
This veMrsSioMn:54JaVn3.21192968/8
Previous version: Dec. 1996
MSM54V32126/8
131,072-Word ¥ 32-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO
DESCRIPTION
The MSM54V32126/8 is a new generation Graphics DRAM organized in a 131,072-word ¥ 32-bit
configuration. The technology used to fabricate the MSM54V32126/8 is OKI's CMOS silicon gate
process technology. The device operates with a single 3.3 V power supply.
FEATURES
• 131,072-word ¥ 32-bit organization
• Single 3.3 V power supply, ±0.3 V tolerance
• Refresh: 512 cycles/8 ms
• Fast Page Mode with Extended Data Out (EDO)
• Write per bit (MSM54V32128 only)
• Byte write, Byte read
• RAS only refresh
• CAS before RAS refresh
• CAS before RAS self-refresh
• Hidden refresh
• Package:
64-pin 525 mil plastic SSOP (SSOP64-P-525-0.80-K)
(Product : MSM54V32126-xxGS-K)
(Product : MSM54V32128-xxGS-K)
xx indicates speed rank.
PRODUCT FAMILY
Family
MSM54V32126/8-50
MSM54V32126/8-60
Access Time (Max.)
tRAC tAA tCAC tOEA
50 ns 25 ns 15 ns 15 ns
60 ns 30 ns 18 ns 18 ns
Cycle Time
(Min.)
110 ns
130 ns
Power Dissipation
Operating (Max.) Standby (Max.)
504 mW
486 mW
3.1 mW
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¡ Semiconductor
MSM54V32126/8
DC Characteristics
Parameter
Symbol
Condition
Output High Voltage
Output Low Voltage
Input Leakage Current
Output Leakage Current
Average Power
Supply Current
(Operating)
VOH IOH = –0.1 mA
VOL IOL = 0.1 mA
0 V < VIN < VCC;
ILI All other pins not
under test = 0 V
ILO
0 V < VOUT < 3.6 V
Output Disable
RAS, CAS cycling,
ICC1 tRC = Min.
(VCC = 3.3 V ±0.3 V, Ta = 0°C to 70°C)
MSM54V32126/8 MSM54V32126/8
-50 -60 Unit Note
Min. Max. Min. Max.
2.0 VCC 2.0 VCC V
0 0.8 0 0.8 V
–10 10 –10 10 mA
–10 10 –10 10 mA
— 130 — 110 mA 1, 2, 3
Power Supply
Current (Standby)
ICC2 RAS, CAS ≥ VCC – 0.2 V — 850 — 850 mA
Average Power
Supply Current
(RAS Only Refresh)
RAS = cycling,
ICC3 CAS = VIH,
tRC = Min.
— 130 — 110 mA 1, 2, 3
Average Power
Supply Current
(Fast Page Mode)
RAS = VIL,
ICC4 CAS cycling,
tHPC = Min.
— 140 — 135 mA 1, 2, 4
Average Power
Supply Current
(CAS before RAS Refresh)
ICC5
RAS = cycling,
CAS before RAS
— 130 — 110 mA 1, 2, 4
Average Power Supply
Current (CAS before RAS
Self-Refresh)
ICCS
RAS = VIL,
CAS = VIL
— 950 — 950 mA 1, 2
Notes:
1. Specified values are obtained with minimum cycle time.
2. ICC is dependent on output loading. Specified values are obtained with the output
open.
3. Address can be changed once or less while RAS = VIL.
4. Address can be changed once or less while CAS = VIH.
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¡ Semiconductor
MSM54V32126/8
Read Cycle (Outputs Controlled by CAS)
RAS
CAS1
|
,,,CAS4
tRC
tRAS
tCRP tRCD
tRAD
tASR tRAH tASC
tCSH
tRSH
tCAS
tCAH tRAL
tRP
tCRP
tRCL
Address
Row Column
tAR tRCH
tRCS tRRH
WB / WE
OE
,DQ0-DQ31
Open
tRAC
tOEA
tCAC
tAA
tROH
tOEZ
Valid Data-out
tCEZ
"H" or "L"
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11 Page |
Páginas | Total 25 Páginas | |
PDF Descargar | [ Datasheet MSM54V32128.PDF ] |
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