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PDF ISL6210 Data sheet ( Hoja de datos )

Número de pieza ISL6210
Descripción Dual Synchronous Rectified MOSFET Drivers
Fabricantes Intersil Corporation 
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®
PRELIMINARY
Data Sheet
November 28, 2006
ISL6210
FN6392.0
Dual Synchronous Rectified MOSFET
Drivers
The ISL6210 integrates two ISL6208A drivers and is
optimized to drive two independent power channels in a
synchronous-rectified buck converter topology. These
drivers combined with an Intersil ISL62xx multiphase PWM
controller forms a complete single-stage core-voltage
regulator solution with high efficiency performance at high
switching frequency for advanced microprocessors.
The IC is biased by a single low voltage supply (5V),
minimizing driver switching losses in high MOSFET gate
capacitance and high switching frequency applications.
Each driver is capable of driving a 3nF load with less than
10ns rise/fall time. Bootstrapping of the upper gate driver is
implemented via an internal low forward drop diode,
reducing implementation cost, complexity, and allowing the
use of higher performance, cost effective N-Channel
MOSFETs. Adaptive shoot-through protection is integrated
to prevent both MOSFETs from conducting simultaneously.
The ISL6210 features 4A typical sink current for the lower
gate driver, enhancing the lower MOSFET gate hold-down
capability during PHASE node rising edge, preventing power
loss caused by the self turn-on of the lower MOSFET due to
the high dV/dt of the switching node.
The ISL6210 also features an input that recognizes a high-
impedance state, working together with Intersil multiphase
PWM controllers to prevent negative transients on the
controlled output voltage when operation is suspended. This
feature eliminates the need for the schottky diode that may
be utilized in a power system to protect the load from
negative output voltage damage.
Ordering Information
PART
NUMBER
(Note)
TEMP.
PART RANGE
MARKING (°C)
PACKAGE PKG.
(Pb-Free) DWG. #
ISL6210CRZ 62 10CRZ -10 to +100 16 Ld 4x4 QFN L16.4x4
ISL6210CRZ-T 62 10CRZ -10 to +100 16 Ld 4x4 QFN L16.4x4
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Features
• 5V Quad N-Channel MOSFET Drives for Two
Synchronous Rectified Bridges
• Adaptive Shoot-Through Protection
- Active Gate Threshold Monitoring
- Programmable Dead-Time
• 0.4Ω On-Resistance and 4A Sink Current Capability
• Supports High Switching Frequency
- Fast Output Rise and Fall
- Ultra Low Three-State Hold-Off Time (20ns)
• Low VF Internal Bootstrap Diode
• Low Bias Supply Current
• Power-On Reset
• QFN Package
- Compliant to JEDEC PUB95 MO-220 QFN-Quad Flat
No Leads-Product Outline
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Core Voltage Supplies for Intel® and AMD®
Microprocessors
• High Frequency Low Profile High Efficiency DC/DC
Converters
• High Current Low Voltage DC/DC Converters
• Synchronous Rectification for Isolated Power Supplies
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Technical Brief 400 and Technical Brief 417 for Power
Train Design, Layout Guidelines, and Feedback
Compensation Design
• Technical Brief 447 “Guidelines for Preventing Boot-to-
Phase Stress on Half-Bridge MOSFET Driver ICs”
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006. All Rights Reserved. Intel® is a registered trademark of Intel Corporation.
AMD® is a registered trademark of Advanced Micro Devices, Inc. All other trademarks mentioned are the property of their respective owners.

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ISL6210 pdf
ISL6210
Electrical Specifications These specifications apply for TA = -10°C to +100°C, Unless Otherwise Noted (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX
UGATE Turn-On Propagation Delay
tPDHU
VVCC = 5V, Outputs Unloaded; RSET = 80kΩ
-
41
-
LGATE Turn-On Propagation Delay
tPDHL
VVCC = 5V, Outputs Unloaded; RSET = 80kΩ
-
33
-
Minimum LGATE On Time in DCM (Note 3)
tLGMIN
- 400 -
OUTPUT
Upper Drive Source Resistance (Note 3)
Upper Drive Source Current (Note 3)
Upper Drive Sink Resistance (Note 3)
Upper Drive Sink Current (Note 3)
Lower Drive Source Resistance (Note 3)
Lower Drive Source Current (Note 3)
Lower Drive Sink Resistance (Note 3)
Lower Drive Sink Current (Note 3)
NOTE:
RUG_SRC
IUG_SCR
RUG_SNK
IUG_SNK
RLG_SRC
ILG_SCR
RLG_SNK
ILG_SNK
250mA Source Current
VUGATE-PHASE = 2.5V
250mA Sink Current
VUGATE-PHASE = 2.5V
250mA Source Current
VLGATE = 2.5V
250mA Sink Current
VLGATE = 2.5V
- 1.0 2.5
- 2.00 -
- 1.0 2.5
2.00 -
- 1.0 2.5
- 2.00 -
- 0.4 1.0
- 4.00 -
3. Guaranteed by Characterization. Not 100% tested in production.
UNITS
ns
ns
ns
Ω
A
Ω
A
Ω
A
Ω
A
Functional Pin Description
NUMBER NAME
FUNCTION
1 GND Bias and reference ground. All signals are referenced to this node.
2 LGATE1 Lower gate drive output of Channel 1. Connect to gate of the low-side power N-Channel MOSFET.
3 PVCC This pin supplies power to both the lower and higher gate drives in ISL6614. Its operating range is +5V to 12V. Place a high
quality low ESR ceramic capacitor from this pin to GND.
4 FCCM Logic control input that will force continuous conduction mode (HIGH state) or allow discontinuous conduction mode
(LOW state). Placing a series resistor in this input will allow the switching dead-time to be programmed.
5 PGND It is the power ground return of both low gate drivers.
6 LGATE2 Lower gate drive output of Channel 2. Connect to gate of the low-side power N-Channel MOSFET.
7 EN Logic control input that will enable (HIGH state) or disable (LOW state) the IC. Shutdown current is <1μA.
8 PHASE2 Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET in Channel 2. This pin
provides a return path for the upper gate drive.
9 UGATE2 Upper gate drive output of Channel 2. Connect to gate of high-side power N-Channel MOSFET.
10 BOOT2 Floating bootstrap supply pin for the upper gate drive of Channel 2. Connect the bootstrap capacitor between this pin and
the PHASE2 pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the Internal Bootstrap
Device section under DESCRIPTION for guidance in choosing the capacitor value.
11 BOOT1 Floating bootstrap supply pin for the upper gate drive of Channel 1. Connect the bootstrap capacitor between this pin and
the PHASE1 pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the Internal Bootstrap
Device section under DESCRIPTION for guidance in choosing the capacitor value.
12 UGATE1 Upper gate drive output of Channel 1. Connect to gate of high-side power N-Channel MOSFET.
13 PHASE1 Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET in Channel 1. This pin
provides a return path for the upper gate drive.
14 VCC Connect this pin to a +5V bias supply. It supplies power to internal analog circuits. Place a high quality low ESR ceramic
capacitor from this pin to GND.
15 PWM1 The PWM signal is the control input for the Channel 1 driver. The PWM signal can enter three distinct states during operation, see
the three-state PWM Input section under DESCRIPTION for further details. Connect this pin to the PWM output of the controller.
16 PWM2 The PWM signal is the control input for the Channel 2 driver. The PWM signal can enter three distinct states during operation, see
the three-state PWM Input section under DESCRIPTION for further details. Connect this pin to the PWM output of the controller.
N/A PAD Connect this pad to the power ground plane (GND) via thermally enhanced connection.
5 FN6392.0
November 28, 2006

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