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PDF SP6133 Data sheet ( Hoja de datos )
| Número de pieza | SP6133 | |
| Descripción | Synchronous Buck Controller | |
| Fabricantes | Sipex Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SP6133 (archivo pdf) en la parte inferior de esta página. Total 20 Páginas | ||
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Solved by
TM
Synchronous Buck Controller
SP6133
FEATURES
■ 5V to 24V Input step down converter
■ Up to 30A output capability
16 15 14 13
■ Highly integrated design, minimal components
■ UVLO Detects Both VCC and VIN
■ Overcurrent circuit protection with auto-restart
GL 1
PGND 2
SP6133
12 GH
11 SWN
■ Power Good Output, ENABLE Input
■ Maximum Controllable Duty Cycle Ratio up to 92% GND 3
■ Wide BW amp allows Type II or III compensation VFB 4
16 Pin QFN
3mm x 3mm
10 ISP
9 ISN
■ Programmable Soft Start
■ Fast Transient Response
■ High Efficiency: Greater than 95% possible
5678
■ Available in Lead Free, RoHS Compliant
16-Pin QFN package
■ External Driver Enable/Disable
■ U.S. Patent #6,922,041
www.DataSheet4U.com
DESCRIPTION
The SP6133 is a synchronous step-down switching regulator controller optimized for high
efficiency. The part is designed to be especially attractive for single supply step down con-
version from 5V to 24V. The SP6133 is designed to drive a pair of external NFETs using a
fixed 300 kHz frequency, PWM voltage mode architecture. Protection features include UVLO,
thermal shutdown, output short circuit protection, and overcurrent protection with auto restart.
The device also features a PWRGD output and an enable input. The SP6133 is available in
a space saving 16-pin QFN and offers excellent thermal performance.
C5
0.1uF
DBST
CVCC
10uF
BAT54WS
VIN BST
VCC
GH
R3 10K
POWERGOOD NC
ENABLE
PWRGD
SWN
UVIN
EN SP6133
GL
GND
TYPICAL APPLICATION CIRCUIT
VIN
CBST
0.1uF
MT, Si4394DY
9.75 mOhm, 30V
C1
22uF
C2
22uF 10-15V
GND
SC5018-2R7M
2.7uH, 15A, 4.1mOhm
MB, Si4320DY
4 mOhm, 30V
RS1
5.11K
RS2
5.11K
VOUT
C3
100uF
C4
100uF 3.3V
0-10A
CF1
22pF
CP1
39 pF
PGND
ISP
ISN
COMP
SS
VFB
CZ3
560pF
CZ2
1500pF
RZ2
23.2K
CSS
47nF
RZ3
1K
CSP
6.8nF
CS
0.1uF
R1
68.1K, 1%
R2
21.5K, 1%
GND
Oct 24-06 Rev L
Note: Die attach paddle is internally connected to GND.
SP6133 Synchronous Buck Controller
© 2006 Sipex Corporation
1 page  
PIN
#
1
PIN
NAME
GL
DESCRIPTION
PIN DESCRIPTION
High current driver output for the low side NFET switch. It is always low if GH is high or during
a fault. Resistor pull down ensures low state at low voltage.
2
PGND
Ground Pin. The power circuitry is referenced to this pin. Return separately from other ground
traces to the (-) terminal of Cout.
3 GND Ground pin. The control circuitry of the IC is referenced to this pin.
Feedback Voltage and Short Circuit Detection pin. It is the inverting input of the Error Amplifier
4
VFB
and serves as the output voltage feedback point for the Buck Converter. The output voltage is
sensed and can be adjusted through an external resistor divider. Whenever VFB drops 0.25V
below the positive reference, a short circuit fault is detected and the IC enters hiccup mode.
Output of the Error Amplifier. It is internally connected to the non-inverting input of the PWM
5 COMP comparator. An optimal filter combination is chosen and connected to this pin and either
ground or VFB to stabilize the voltage mode loop.
6
EN
Enable Pin. Pulling this pin below 0.4V will place the IC into sleep mode. This pin is internally
pulled to VCC with a 1µA current source.
7
PWRGD
Power Good Output. This open drain output is pulled low when VOUT is outside of the
regulation. Connect an external resistor to pull high.
Soft Start/Fault Flag. Connect an external capacitor between SS and GND to set the soft start
8 SS rate based on the 10µA source current. The SS pin is held low via a 1mA (min) current during
all fault conditions.
9
ISN
Negative Input for the Sense Comparator. There should be a 60mV offset between PSENSE
and NSENSE. Offset accuracy +10%.
10 ISP Positive Input for the Inductor Current Sense.
11
SWN
Lower supply rail for the GH high-side gate driver. Connect this pin to the switching node at
the junction between the two external power MOSFET transistors.
12 GH High current driver output for the high side NFET switch. It is always low if GL is high or during a fault.
13
BST
High side driver supply pin. Connect BST to the external boost diode and capacitor as shown
in the Application Schematic of page 1. High side driver is connected between BST pin and SWN pin.
14 VIN Supply Input -- supplies power to the internal LDO.
15
UVIN
Under Voltage lock-out for VIN voltage. Internally has a resistor divider from VIN to ground.
Can be overridden with external resistors.
16
VCC
Output of the Internal LDO. If VIN is less than 5V then Vcc should be powered from an
external 5V supply.
Note: Die attach paddle is internally connected to GND.
THEORY OF OPERATION
General Overview
The SP6133 is a fixed frequency, voltage
mode, synchronous PWM controller opti-
mized for high efficiency. The part has been
designed to be especially attractive for single
supply input voltages ranging between 5V
and 24V.
The heart of the SP6133 is a wide bandwidth
transconductance amplifier designed to ac-
commodate Type II and Type III compensa-
tion schemes. A precision 0.8V reference
present on the positive terminal of the error
amplifier permits the programming of the
output voltage down to 0.8V via the VFB pin.
The output of the error amplifier, COMP,
compared to a 1V peak-to-peak ramp is
responsible for trailing edge PWM control.
This voltage ramp and PWM control logic are
governed by the internal oscillator that ac-
curately sets the PWM frequency to 300 kHz.
Oct 24-06 Rev L
SP6133 Synchronous Buck Controller
© 2006 Sipex Corporation
5 Page 
APPLICATION INFORMATION
For example, if it is required to have a Vin
start threshold of 7V, then let R5 = 5KΩ and
using equation (8) we get R4 = 9.09KΩ.
Inductor Selection
There are many factors to consider in select-
ing the inductor including cost, efficiency,
size and EMI. In a typical SP6133 circuit,
the inductor is chosen primarily for value,
saturation current and DC resistance. In-
creasing the inductor value will decrease
output voltage ripple, but degrade transient
response. Low inductor values provide the
smallest size, but cause large ripple cur-
rents, poor efficiency and need more output
capacitance to smooth out the larger ripple
current. The inductor must also be able to
handle the peak current at the switching
frequency without saturating, and the copper
resistance in the winding should be kept as
low as possible to minimize resistive power
loss. A good compromise between size, loss
and cost is to set the inductor ripple current
to be within 20% to 40% of the maximum
output current.
The switching frequency and the inductor
operating point determine the inductor value
as follows:
L = Vout • (vin(max) - Vout)
.
Vin(max) • Fs • Kr • Iout(max)
where:
Fs = switching frequency
Kr = ratio of the ac inductor ripple current
to the maximum output current
The peak to peak inductor ripple current is:
Ipp =
vout • (vin(max) - vout)
vin(max) • fs • L
and provide low core loss at the high switch-
ing frequency. Low cost powdered iron cores
have a gradual saturation characteristic
but can introduce considerable ac core
loss, especially when the inductor value is
relatively low and the ripple current is high.
Ferrite materials, on the other hand, are more
expensive and have an abrupt saturation
characteristic with the inductance dropping
sharply when the peak design current is
exceeded. Nevertheless, they are preferred
at high switching frequencies because they
present very low core loss and the design
only needs to prevent saturation. In general,
ferrite or molypermalloy materials are the
better choice for all but the most cost sensi-
tive applications.
The power dissipated in the inductor is equal
to the sum of the core and copper losses.
To minimize copper losses, the winding
resistance needs to be minimized, but this
usually comes at the expense of a larger
inductor. Core losses have a more significant
contribution at low output current where the
copper losses are at a minimum, and can
typically be neglected at higher output cur-
rents where the copper losses dominate.
Core loss information is usually available
from the magnetic vendor.
The copper loss in the inductor can be cal-
culated using the following equation:
pl(cu)
=
i2
l(rms)
•
rwinding
where IL(RMS) is the RMS inductor current that
can be calculated as follows:
il(rms) =
Once the required inductor value is selected,
the proper selection of core material is based
on peak inductor current and efficiency re-
quirements. The core must be large enough
not to saturate at the peak inductor current
ipeak = iout(max) + Ipp/2
..
√ { }iout(max) •
1+1
3
•
Ipp
iout(max)
2
Oct 24-06 Rev L
SP6133 Synchronous Buck Controller
© 2006 Sipex Corporation
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet SP6133.PDF ] | |
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