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PDF MC74VHC139 Data sheet ( Hoja de datos )
| Número de pieza | MC74VHC139 | |
| Descripción | Dual 2-to-4 Decoder/Demultiplexer | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MC74VHC139 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 2-to-4 Decoder/
Demultiplexer
The MC74VHC139 is an advanced high speed CMOS 2–to–4 decoder/
demultiplexer fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
When the device is enabled (E = low), it can be used for gating or as a data
input for demultiplexing operations. When the enable input is held high, all
four outputs are fixed high, independent of other inputs.
The internal circuit is composed of three stages, including a buffer output
which provides high noise immunity and stable output. The inputs tolerate
voltages up to 7V, allowing the interface of 5V systems to 3V systems.
• High Speed: tPD = 5.0ns (Typ) at VCC = 5V
• Low Power Dissipation: ICC = 4µΑ (Max) at TA = 25°C
• High Noise Immunity: VNIH = VNIL = 28% VCC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2V to 5.5V Operating Range
• Low Noise: VOLP = 0.8 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
• Chip Complexity: 100 FETs or 25 Equivalent Gates
LOGIC DIAGRAM
www.DataSheet4U.com
ADDRESS
INPUTS
A0a 2
A1a 3
Ea 1
ADDRESS
INPUTS
A0b 14
A1b 13
Eb 15
4 Y0a
5 Y1a
6 Y2a
7 Y3a
ACTIVE–LOW
OUTPUTS
12 Y0b
11 Y1b
10 Y2b
9 Y3b
ACTIVE–LOW
OUTPUTS
MC74VHC139
D SUFFIX
16–LEAD SOIC PACKAGE
CASE 751B–05
DT SUFFIX
16–LEAD TSSOP PACKAGE
CASE 948F–01
M SUFFIX
16–LEAD SOIC EIAJ PACKAGE
CASE 966–01
ORDERING INFORMATION
MC74VHCXXXD
MC74VHCXXXDT
MC74VHCXXXM
SOIC
TSSOP
SOIC EIAJ
PIN ASSIGNMENT
Ea 1
A0a 2
A1a 3
Y0a 4
Y1a 5
Y2a 6
Y3a 7
GND 8
16 VCC
15 Eb
14 A0b
13 A1b
12 Y0b
11 Y1b
10 Y2b
9 Y3b
FUNCTION TABLE
Inputs
E A1 A0
H XX
L LL
L LH
L HL
L HH
Outputs
Y0 Y1 Y2 Y3
H HH H
L HH H
H LH H
H HL H
H HH L
6/97
© Motorola, Inc. 1997
1
REV 0
1 page  
–A
–
16
1
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
9
–B
–
8
P 8 PL
0.25 (0.010) M
BM
–T
SEAT–ING
PLANE
G
K
C
D 16 PL
0.25 (0.010) M T B S A S
M
R X 45°
F
J
MC74VHC139
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 9.80 10.00 0.386 0.393
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G
1.27 BSC
0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0° 7° 0° 7°
P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019
0.15 (0.006) T U S
16
2X L/2
L
PIN 1
IDENT.
1
0.15 (0.006) T U S
0.10 (0.004)
–T– SEATING
PLANE
D
C
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948F–01
ISSUE O
16X K REF
0.10 (0.004) M
9
8
A
–V–
G
T U S VS
B
–U–
N
H
NOTES:
K 1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
J1 ÇÇÉÉKÇÇÉÉ1
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH OR
GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER
SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
SECTION N–N
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED
J 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR PROTRUSION
SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL CONDITION.
N
0.25 (0.010)
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED AT
DATUM PLANE –W–.
M
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
F C ––– 1.20 ––– 0.047
D 0.05 0.15 0.002 0.006
DETAIL E
F 0.50 0.75 0.020 0.030
G 0.65 BSC
0.026 BSC
H 0.18 0.28 0.007 0.011
J 0.09 0.20 0.004 0.008
–W–
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC
0.252 BSC
DETAIL E
M 0_ 8_ 0_ 8_
VHC Data – Advanced CMOS Logic
DL203 — Rev 0
5
MOTOROLA
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet MC74VHC139.PDF ] | |
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