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PDF ADG3300 Data sheet ( Hoja de datos )
| Número de pieza | ADG3300 | |
| Descripción | 8-Channel Bidirectional Logic Level Translator | |
| Fabricantes | Analog Devices | |
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Low Voltage 1.15 V to 5.5 V, 8-Channel
Bidirectional Logic Level Translator
ADG3300
FEATURES
Bidirectional level translation
Operates from 1.15 V to 5.5 V
Low quiescent current <1 µA
No direction pin
APPLICATIONS
Low voltage ASIC level translation
Smart card readers
Cell phones and cell phone cradles
Portable communications devices
Telecommunications equipment
Network switches and routers
Storage systems (SAN/NAS)
Computing/server applications
GPS
Portable POS systems
Low cost serial interfaces
GENERAL DESCRIPTION
The ADG3300 is a bidirectional logic level translator that con-
tains eight bidirectional channels. It can be used in multivoltage
digital system applications such as data transfer between a low
voltage DSP/controller and a higher voltage device. The internal
architecture allows the device to perform bidirectional logic
level translation without an additional signal to set the direction
of the translation.
The voltage applied to VCCA sets the logic levels on the A side of
the device, while VCCY sets the levels on the Y side. For proper
operation, VCCA must always be less than VCCY. The VCCA-com-
patible logic signals applied to the A side of the device appear as
VCCY-compatible levels on the Y side. Similarly, VCCY-compatible
logic levels applied to the Y side of the device appear as VCCA-
compatible logic levels on the A side.
The enable pin provides three-state operation of the Y side pins.
When the enable pin (EN) is pulled low, the A1 to A8 pins are
FUNCTIONAL BLOCK DIAGRAM
VCCA
VCCY
A1 Y1
A2 Y2
A3 Y3
A4 Y4
A5 Y5
A6 Y6
A7 Y7
A8 Y8
EN
GND
Figure 1.
internally pulled down by 6 kΩ resistors, while the Y terminals
are in the high impedance state. The EN pin is referred to VCCA
supply voltage and driven high for normal operation.
The ADG3300 is available in a compact 20-lead TSSOP package,
and it is guaranteed to operate over the 1.15 V to 5.5 V supply
voltage range and extended −40°C to +85°C temperature range.
PRODUCT HIGHLIGHTS
1. Bidirectional level translation.
2. Fully guaranteed over the 1.15 V to 5.5 V supply range.
3. No direction pin.
4. 20-lead TSSOP package.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
1 page  
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Parameter
POWER REQUIREMENTS
Power Supply Voltages
Quiescent Power Supply Current
Symbol
VCCA
VCCY
ICCA
ICCY
Three-State Mode Power Supply Current
IHiZA
IHiZY
1 Temperature range is a follows: B version: −40°C to +85°C.
2 All typical values are at TA = 25°C, unless otherwise noted.
3 Guaranteed by design; not subject to production test.
Conditions
VCCA ≤ VCCY
VA = 0 V/VCCA, VY = 0 V/VCCY,
VCCA = VCCY = 5.5 V, EN = 1
VA = 0 V/VCCA, VY = 0 V/VCCY,
VCCA = VCCY = 5.5 V, EN = 1
VCCA = VCCY = 5.5 V, EN = 0
VCCA = VCCY = 5.5 V, EN = 0
ADG3300
Min Typ2 Max Unit
1.15 5.5 V
1.65 5.5 V
0.17 5
µA
0.27 5
µA
0.1 5 µA
0.1 5 µA
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TA = 25°C
CL = 50pF
DATA RATE = 25Mbps 1 CHANNEL
ADG3300
TA = 25°C
DATA RATE = 50Mbps
CL = 15pF
1 CHANNEL
200mV/DIV
5ns/DIV
Figure 21. Eye Diagram at Y Output (1.2 V to 1.8 V Level Translation, 25 Mbps)
TA = 25°C
DATA RATE = 25Mbps
CL = 50pF
1 CHANNEL
400mV/DIV
3ns/DIV
Figure 24. Eye Diagram at A Output (3.3 V to 1.8 V Level Translation, 50 Mbps)
TA = 25°C
DATA RATE = 50Mbps
CL = 50pF
1 CHANNEL
400mV/DIV
5ns/DIV
Figure 22. Eye Diagram at A Output (1.8 V to 1.2 V Level Translation, 25 Mbps)
TA = 25°C
CL = 50pF
DATA RATE = 50Mbps 1 CHANNEL
1V/DIV
3ns/DIV
Figure 25. Eye Diagram at Y Output (3.3 V to 5 V Level Translation, 50 Mbps)
TA = 25°C
DATA RATE = 50Mbps
CL = 15pF
1 CHANNEL
500mV/DIV
3ns/DIV
Figure 23. Eye Diagram at Y Output (1.8 V to 3.3 V Level Translation, 50 Mbps)
800mV/DIV
3ns/DIV
Figure 26. Eye Diagram at A Output (5 V to 3.3 V Level Translation, 50 Mbps)
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Rev. 0 | Page 11 of 20
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet ADG3300.PDF ] | |
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