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PDF CY2412 Data sheet ( Hoja de datos )

Número de pieza CY2412
Descripción MPEG Clock Generator with VCXO
Fabricantes Cypress Semiconductor 
Logotipo Cypress Semiconductor Logotipo



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CY2412
MPEG Clock Generator with VCXO
Features
• Integrated phase-locked loop (PLL)
• Low-jitter, high-accuracy outputs
• VCXO with analog adjust
• 3.3V operation
• 8-pin SOIC package
Benefits
• Highest-performance PLL tailored for multimedia appli-
cations
• Meets critical timing requirements in complex system
designs
• Large ± 150-ppm range, better linearity
• Enables application compatibility
Part Number
CY2412-1
CY2412-3
Outputs
3
3
Input Frequency Range
13.5-MHz pullable crystal input per
Cypress specification
13.5-MHz pullable crystal input per
Cypress specification
Output Frequencies
VCXO Profile
Two 27 MHz outputs, one 54 MHz (3.3V) Linear
27 MHz, 13.5 MHz, 54 MHz (3.3V)
Linear
Logic Block Diagram
13.5 XIN
XOUT
VCXO
OSC
QΦ
VCO
P
PLL
VDD VSS
OUTPUT
DIVIDERS
CLKC
CLKB
CLKA
Pin Configuration
CY2412-1,-3
8-pin SOIC
XIN
VDD
VCXO
VSS
1
2
3
4
8 XOUT
7 CLKC
6 CLKB
5 CLKA
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07227 Rev. *D
Revised December 13, 2004
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CY2412 pdf
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CY2412
Package Diagram
8 Lead (150 Mil) SOIC 8S-0le8ad (150-Mil) SOIC S8
PIN 1 ID
41
0.150[3.810]
0.157[3.987]
0.230[5.842]
0.244[6.197]
1. DIMENSIONS IN INCHES[MM] MIN.
MAX.
2. PIN 1 ID IS OPTIONAL,
ROUND ON SINGLE LEADFRAME
RECTANGULAR ON MATRIX LEADFRAME
3. REFERENCE JEDEC MS-012
4. PACKAGE WEIGHT 0.07gms
58
PART #
S08.15 STANDARD PKG.
SZ08.15 LEAD FREE PKG.
0.189[4.800]
0.196[4.978]
SEATING PLANE
0.010[0.254] X 45°
0.016[0.406]
0.061[1.549]
0.068[1.727]
0.050[1.270]
BSC
0.004[0.102]
0.0098[0.249]
0.0138[0.350]
0.0192[0.487]
0.004[0.102]
0°~8°
0.016[0.406]
0.035[0.889]
0.0075[0.190]
0.0098[0.249]
51-85066-*C
All products and company names mentioned in this document may be the trademarks of their respective holders.
Document #: 38-07227 Rev. *D
Page 5 of 6
© Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
DataSheet 4 U .comproducts in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

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