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PDF MC74LVX257 Data sheet ( Hoja de datos )

Número de pieza MC74LVX257
Descripción Quad 2-Channel Multiplexer with 3-State Outputs
Fabricantes ON Semiconductor 
Logotipo ON Semiconductor Logotipo



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MC74LVX257
Quad 2−Channel Multiplexer
with 3−State Outputs
The MC74LVX257 is an advanced high speed CMOS quad
2−channel multiplexer fabricated with silicon gate CMOS technology.
It consists of four 2−input digital multiplexers with common select
(S) and enable (OE) inputs. When (OE) is held High, selection of data
is inhibited and all the outputs go Low.
The select decoding determines whether the A or B inputs get routed
to the corresponding Y outputs.
The inputs tolerate voltages up to 7.0 V, allowing the interface of
5.0 V systems to 3.0 V systems.
Features
High Speed: tPD = 4.5 ns (Typ) at VCC = 3.3 V
Low Power Dissipation: ICC = 4 mA (Max) at TA = 25°C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: VOLP = 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
Chip Complexity: FETs = 100; Equivalent Gates = 25
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
Pb−Free Packages are Available*
http://onsemi.com
MARKING
DIAGRAMS
SOIC−16
D SUFFIX
CASE 751B
16
LVX257
AWLYWW
1
TSSOP−16
DT SUFFIX
CASE 948F
16
LVX
257
ALYW
1
SOEIAJ−16
M SUFFIX
CASE 966
16
LVX257
ALYW
1
A = Assembly Location
WL or L = Wafer Lot
Y = Year
WW or W = Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
March, 2005 − Rev. 3
DataSheet4 U .com
1
Publication Order Number:
MC74LVX257/D

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MC74LVX257 pdf
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MC74LVX257
NOISE CHARACTERISTICS Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 3.3 V
Symbol
VOLP
VOLV
VIHD
VILD
Characteristic
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
TA = 25°C
Typ Max
0.3 0.5
−0.3
−0.5
2.0
0.8
Unit
V
V
V
V
VCC
A, B or S
50%
GND
tPLH tPHL
Y 50% VCC
Figure 4. Switching Waveform
OE 50%
tPZL tPLZ
Y 50% VCC
tPZH tPHZ
Y 50% VCC
VCC
GND
HIGH
IMPEDANCE
VOL + 0.3V
VOH − 0.3V
HIGH
IMPEDANCE
Figure 5. Switching Waveform
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 6. Test Circuit
DEVICE
UNDER
TEST
TEST POINT
1 kW
OUTPUT
CL *
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
*Includes all probe and jig capacitance
Figure 7. Test Circuit
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INPUT
Figure 8. Input Equivalent Circuit
http://onsemi.com
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