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PDF MC74LVX138 Data sheet ( Hoja de datos )
| Número de pieza | MC74LVX138 | |
| Descripción | LOW-VOLTAGE CMOS | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
3-to-8 Line Decoder
With 5V-Tolerant Inputs
MC74LVX138
The MC74LVX138 is an advanced high speed CMOS 3–to–8 line
decoder. The inputs tolerate voltages up to 7V, allowing the interface of
5V systems to 3V systems.
When the device is enabled, three Binary Select inputs (A0 – A2)
determine which one of the outputs (O0 – O7) will go Low. When enable
input E3 is held Low or either E2 or E1 is held High, decoding function is
inhibited and all outputs go high. E3, E2, and E1 inputs are provided to
ease cascade connection and for use as an address decoder for memory
systems.
• High Speed: tPD = 5.5ns (Typ) at VCC = 3.3V
• Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Low Noise: VOLP = 0.5V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
VCC O0 O1 O2 O3 O4 O5 O6
16 15 14 13 12 11 10 9
LVX
LOW–VOLTAGE CMOS
D SUFFIX
16–LEAD SOIC PACKAGE
CASE 751B–05
DT SUFFIX
16–LEAD TSSOP PACKAGE
CASE 948F–01
12345678
A0 A1 A2 E1 E2 E3 O7 GND
Figure 1. 16–Lead Pinout (Top View)
M SUFFIX
16–LEAD SOIC EIAJ PACKAGE
CASE 966–01
PIN NAMES
Pins
A0–A2
E1–E2
E3
O0–O7
Function
Address Inputs
Enable Inputs
Enable Input
Outputs
6/97
© Motorola, Inc. 1997
DataSheet4 U .com
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A
tPLH
O
VALID
50%
50% VCC
SWITCHING WAVEFORMS
VALID
tPHL
VCC
GND
E3
tPHL
O
50%
50% VCC
Figure 4.
Figure 5.
MC74LVX138
VCC
GND
tPLH
E2 or E1 50%
O
tPHL
50% VCC
Figure 6.
VCC
GND
tPLH
TEST CIRCUIT
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
* Includes all probe and jig capacitance
Figure 7. Test Circuit
LCX DATA
DataSheetB4RU13.c39om— REV 3
5
MOTOROLA
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet MC74LVX138.PDF ] | |
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