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PDF MC74LVX132 Data sheet ( Hoja de datos )

Número de pieza MC74LVX132
Descripción Quad 2-Input NAND Schmitt Trigger
Fabricantes ON Semiconductor 
Logotipo ON Semiconductor Logotipo



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MC74LVX132
Quad 2−Input NAND
Schmitt Trigger
The MC74LVX132 is an advanced high speed CMOS Schmitt
NAND trigger fabricated with silicon gate CMOS technology.
Pin configuration and function are the same as the MC74LVX00,
but the inputs have hysteresis.
The internal circuit is composed of multiple stages, including a
buffer output which provides high noise immunity and stable output.
The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
High Speed: tPD = 5.8 ns (Typ) at VCC = 3.3 V
Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
Power Down Protection Provided on Inputs
Low Noise: VOLP = 0.5 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
Pb−Free Packages are Available*
http://onsemi.com
MARKING
DIAGRAMS
14
1
14
SOIC−14
D SUFFIX
CASE 751A
1
LVX132
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
LVX
132
ALYW
1
14
1
14
SOEIAJ−14
M SUFFIX
CASE 965
74LVX132
ALYW
1
A = Assembly Location
WL or L = Wafer Lot
Y = Year
WW or W = Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
March, 2005 − Rev. 2
DataSheet4 U .com
1
Publication Order Number:
MC74LVX132/D

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MC74LVX132 pdf
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MC74LVX132
A 50%
tPLH
VCC
GND
tPHL
Y 50% VCC
Figure 3. Switching Waveforms
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 4. Test Circuit
4
3
2
(VT+)
VHtyp
(VT−)
1
2 2.5 3 3.5 4
VCC, POWER SUPPLY VOLTAGE (VOLTS)
VHtyp = (VT+ typ) − (VT− typ)
Figure 5. Typical Input Threshold, VT+, VT− versus Power Supply Voltage
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