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PDF MC74LVQ574 Data sheet ( Hoja de datos )
| Número de pieza | MC74LVQ574 | |
| Descripción | LOW-VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP | |
| Fabricantes | Motorola Semiconductors | |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low-Voltage Quiet CMOS
Octal D-Type Flip-Flop
Flow Through Pinout
(3-State, Non-Inverting)
The MC74LVQ574 is a high performance, non–inverting octal D–type
flip–flop operating from a 2.7 to 3.6V supply. The MC74LVQ574 is
suitable for TTL level bus oriented applications where a memory element
is required.
Current drive capability is 12mA at the outputs. The MC74LVQ574
consists of 8 edge–triggered flip–flops with individual D–type inputs and
3–state true outputs. The buffered clock and buffered Output Enable (OE)
are common to all flip–flops. The eight flip–flops will store the state of
individual D inputs that meet the setup and hold time requirements on the
LOW–to–HIGH Clock (CP) transition. With the OE LOW, the contents of
the eight flip–flops are available at the outputs. When the OE is HIGH, the
outputs go to the high impedance state. The OE input level does not affect
the operation of the flip–flops.
• Designed for 2.7 to 3.6V VCC Operation – Ideal for Low Power/Low
Noise Applications
• Guaranteed Simultaneous Switching Noise Level and Dynamic
Threshold Performance
• Guaranteed Skew Specifications
• Guaranteed Incident Wave Switching into 75Ω
• Low Static Supply Current (10µA) Substantially Reduces System Power
Requirements
• Latchup Performance Exceeds 500mA
• ESD Performance: Human Body Model >2000V
MC74LVQ574
LVQ
LOW–VOLTAGE CMOS
OCTAL D–TYPE FLIP–FLOP
20
1
20
1
20
1
DW SUFFIX
PLASTIC SOIC
CASE 751D–04
M SUFFIX
PLASTIC SOIC EIAJ
CASE 967–01
SD SUFFIX
PLASTIC SSOP
CASE 940C–03
Pinout: 20–Lead (Top View)
VCC O0 O1 O2 O3 O4 O5 O6 O7 CP
20 19 18 17 16 15 14 13 12 11
1 2 3 4 5 6 7 8 9 10
OE D0 D1 D2 D3 D4 D5 D6 D7 GND
20
1
DT SUFFIX
PLASTIC TSSOP
CASE 948E–02
PIN NAMES
Pins
Function
OE
CP
D0–D7
O0–O7
Output Enable Input
Clock Pulse Input
Data Inputs
3–State Outputs
11/95
© Motorola, Inc. 1995
DataSheet4 U .com
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MC74LVQ574
Dn
ts
CP
On
50% VCC
th
50% VCC
fmax
tPLH, tPHL
50% VCC
VCC
50% VCC
0V
VCC
0V
VOH
VOL
WAVEFORM 1 – PROPAGATION DELAYS, SETUP AND HOLD TIMES
tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns
OE
tPZH
On
50% VCC
tPHZ
50% VCC
50% VCC
tPZL
On
tPLZ
50% VCC
VCC
0V
VCC
VOH – 0.3V
≈ 0V
≈ 3.0V
VOL + 0.3V
GND
WAVEFORM 2 – OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns
CP 50% VCC
tw
VCC
50% VCC
0V
CP
PULSE
GENERATOR
50% VCC
tw
VCC
50% VCC
0V
WAVEFORM 3 – PULSE WIDTH
tR = tF = 2.5ns (or fast as required) from 10% to 90%;
Output requirements: VOL ≤ 0.8V, VOH ≥ 2.0V
Figure 1. AC Waveforms
VCC
DUT
RT
R1
CL RL
2 • VCC
OPEN
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
2 • VCC
Open Collector/Drain tPLH and tPHL
2 • VCC
tPZH, tPHZ
Open
CL = 50pF or equivalent (Includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
Figure 2. Test Circuit
ECLinPS and ECLinPS Lite
DataSheetD4LU14.0co—mRev 3
5
MOTOROLA
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet MC74LVQ574.PDF ] | |
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