PDF CS5530A Data sheet ( Hoja de datos )

Número de pieza	CS5530A
Descripción	Geode CS5530A I/O Companion Multi-Function South Bridge
Fabricantes	National Semiconductor
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No Preview Available ! www.DataSheet4U.com May 2001 Revision 1.1 Geode™ CS5530A I/O Companion Multi-Function South Bridge General Description The CS5530A I/O companion is designed to work in con- junction with a GX-series processor (i.e., GX1, GXLV, GXm); all members of the National Semiconductor® Geode™ family of products. Together, the Geode proces- sor and CS5530A provide a system-level solution well suited for the high performance needs of a host of devices which include digital set-top boxes and thin client devices. Due to the low power consumption of the GX-series pro- cessors, this solution satisfies the needs of battery pow- ered devices such as National’s WebPAD™ system, and thermal design is eased allowing for fanless system design. The CS5530A I/O companion is a PCI-to-ISA bridge (South Bridge), ACPI-compliant chipset that provides AT/ISA style functionality. The device contains state-of-the-art power management that enables systems, especially battery powered systems, to significantly reduce power consump- tion. Audio is supported through PCI bus master engines which connect to an AC97 compatible codec such as the National Semiconductor LM4548. If industry standard audio is required, a combination of hardware and software called Virtual System Architecture® (VSA™) technology is pro- vided. The Geode GX-series processors’ graphics/video output is connected to the CS5530A. The CS5530A graphics/video support includes a PLL that generates the DOT clock for the GX-series processors (where the graphics controller is located), video acceleration hardware, gamma RAM plus three DACs for RGB output to CRT, and digital RGB that can be directly connected to TFT panels or NTSC/PAL encoders. The digital RGB output can also be connected to the National Semiconductor Geode CS9211 graphics com- panion (a flat panel display controller) for DSTN panel sup- port. DataSheet4U.com Geode™ CS5530A Internal Block Diagram PCI Bus DataShee USB GPIOs GPCS PCI to USB Macro Pwr Mgmt, Traps, Events, and Timers PCI to X-Bus / X-Bus to PCI Bridge X-Bus CS5530A Support PCI Configuration Registers Active Decode Address Mapper X-Bus Arbiter Graphics and Video from CPU Display Display Interface MPEG, DOT Clock CSC and SCL RGB/FP Interface Geode™ CS9211 Graphics Companion AT Compatibility Logic ISA Bus Interface AT Ports, ISA Megacells Ultra DMA/33 IDE Interface Joystick Joystick / Game Port ISA Bus PC97317 SIO IDE Audio/Codec/MPU Interface AC97 Codec (e.g., LM4548) DataSheet4U.comNational Semiconductor and Virtual System Architecture are registered trademarks of National Semiconductor Corporation. Geode, VSA and WebPAD are trademarks of National Semiconductor Corporation. For a complete listing of National Semiconductor trademarks, please visit www.national.com/trademarks. © 2001 National Semiconductor Corporation DataSheet4 U .com www.national.com 1 page www.DataSheet4U.com et4U.com Table of Contents (Continued) 3.7 XPRESSAUDIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 3.7.1 Subsystem Data Transport Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 3.7.1.1 3.7.1.2 3.7.1.3 3.7.1.4 3.7.1.5 Audio Bus Masters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 Physical Region Descriptor Table Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 Physical Region Descriptor Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 AC97 Codec Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 3.7.2 VSA Technology Support Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 3.7.2.1 VSA Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 3.7.2.2 Audio SMI Related Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 3.7.2.3 IRQ Configuration Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 3.8 DISPLAY SUBSYSTEM EXTENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 3.8.1 Video Interface Configuration Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 3.8.2 Video Accelerator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 3.8.2.1 3.8.2.2 3.8.2.3 3.8.2.4 3.8.2.5 Line Buffers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 Video Port Protocol. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 Video Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 X and Y Scaler / Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 Color-Space-Converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 3.8.3 Video Overlay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 3.8.4 Gamma RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 3.8.5 Display Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 3.8.5.1 Video DACs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 3.8.5.2 VESA DDC2B / DPMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 3.8.5.3 Flat Panel Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 3.9 UNIVERSAL SERIAL BUS SUPPORT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138 3.9.1 USB PCI Controller .D. a. t.a.S.h. e. e. t.4.U...co. m. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138 3.9.2 USB Host Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 3.9.3 USB Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 4.0 Register Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 4.1 PCI CONFIGURATION SPACE AND ACCESS METHODS . . . . . . . . . . . . . . . . . . . . . . . . . 141 4.2 REGISTER SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142 4.3 CHIPSET REGISTER SPACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 4.3.1 Bridge Configuration Registers - Function 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 4.3.2 SMI Status and ACPI Timer Registers - Function 1 . . . . . . . . . . . . . . . . . . . . . . . . . 182 4.3.3 IDE Controller Registers - Function 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188 4.3.4 XpressAUDIO Registers - Function 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192 4.3.5 Video Controller Registers - Function 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203 4.4 USB REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210 4.5 CS5530A ISA LEGACY I/O REGISTER SPACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 4.6 V-ACPI I/O REGISTER SPACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229 DataShee DataSheet4U.com Revision 1.1 DataSheet4 U .com 5 www.national.com 5 Page www.DataSheet4U.com Architecture Overview (Continued) 1.8 CLOCK GENERATION In a CS5530A/GX-series processor based system, the CS5530A generates only the video DOT clock (DCLK) for the CPU and the ISA clock. All other clocks are generated by an external clock chip. The ISACLK is created by dividing the PCICLK. For ISA compatibility, the ISACLK nominally runs at 8.33 MHz or less. The ISACLK dividers are programmed via F0 Index 50h[2:0]. DCLK is generated from the 14.31818 MHz input (CLK_14MHZ). A combination of a phase locked loop (PLL), linear feedback shift register (LFSR) and divisors are used to generate the desired frequencies for the DCLK. The divisors and LFSR are configurable through the F4BAR+Memory Offset 24h. For applications that do not use the GX-series processor’s graphics subsystem, this is an available clock for general purpose use. Figure 1-4 shows a block diagram for clock generation within the CS5530A. 1.9 UNIVERSAL SERIAL BUS The CS5530A provides two complete, independent USB ports. Each port has a Data “–” and a Data “+” pin. The USB controller is a compliant Open Host Controller Interface (OpenHCI). The OpenHCI specification provides a register-level description for a host controller, as well as a common industry hardware/software interface and drivers (see OpenHCI Specification, Revision 1.0, for description). et4U.com TVCLK CLK_14MHZ PCICLK DCLK PLL M U X ÷N DCLK DataSheet4U.com ISACLK Figure 1-4. CS5530A Clock Generation DataShee DataSheet4U.com Revision 1.1 DataSheet4 U .com 11 www.national.com 11 Page

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