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PDF TMP90C801 Data sheet ( Hoja de datos )
| Número de pieza | TMP90C801 | |
| Descripción | (TMP90C800 / TMP90C801) CMOS 8-Bit Microcontrollers | |
| Fabricantes | Toshiba | |
| Logotipo |  |
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TOSHIBA
TLCS-90 Series
TMP90C800/801
CMOS 8–Bit Microcontrollers
TMP90C800N/TMP90C801N
TMP90C800F/TMP90C801F
1. Outline and Characteristics
The TMP90C800 is a high-speed advanced 8-bit microcontroller (3) Internal ROM: 8K bytes (The TMP90C801 does not
applicable to a variety of equipment.
With its 8-bit CPU, ROM, RAM, timer/event counter and gen-
eral-purpose serial interface integrated into a single CMOS chip,
mthe TMP90C800 allows the expansion of external
memories for programs and data (up to 56K bytes). The function of
oTMP90C800 is exactly same as the TMP90C400 except the
.cinternal ROM/RAM size.
The TMP90C801 is the same as the TMP90C800 but
without the ROM.
The TMP90C800N/801N is in a shrink Dual Inline Package
U(SDIP64-P-750).
t4The TMP90C800F/801F is in a Quad Flat package
(QFP64-P-1420A)
The characteristics of the TMP90C800 include:
e(1) Powerful instructions: 163 basic instructions, including
eMultiplication, division, 16-bit arithmetic operations, bit
hmanipulation instructions
(2) Minimum instruction executing time: 320ns (at
S12.5MHz oscillation frequency)
have a built-in ROM)
(4) Internal RAM: 256 bytes
(5) Memory expansion
External memory: 56K bytes
(6) General-purpose serial interface (1 channel)
Asynchronous mode, I/O interface mode
(7) 8-bit timers (4 channel): (2 external clock input)
(8) Port with zero-cross detection circuit (4 input)
(9) Input/Output ports (56 pins)
- Ports with programmable pull-up resistor (22 pins)
- Allows I/O selection on bit basis
- Multiplexer ports of address data bus
(10) Interrupt function: 7 internal interrupts and 3 external
interrupts
(11) Micro Direct Memory Access (DMA) function (8 channels)
(12) Standby function (4 HALT modes)
www.Data taSheet4U.comThe information contained here is subject to change without notice.
aThe information contained herein is presented only as guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties
which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. These TOSHIBA products are intended for usage in general electronic
.Dequipments (office equipment, communication equipment, measuring equipment, domestic electrification, etc.) Please make sure that you consult with us before you use these TOSHIBA products in equip-
ments which require high quality and/or reliability, and in equipments which could have major impact to the welfare of human life (atomic energy control, spaceship, traffic signal, combustion control, all types
wof safety devices, etc.). TOSHIBA cannot accept liability to any damage which may occur in case these TOSHIBA products were used in the mentioned equipments without prior consultation with TOSHIBA.
wwTOSHIBA CORPORATION
1/14
1 page  
2.2 Pin Names and Functions
The names of input/output pins and their functions are summarized in Table 2.2.
TMP90C800/801
Pin Name
P00 ~ P07
/AD0 ~ AD7
P10 ~ P17
/A8 ~ A15
P20 ~ P23
P24
/NMI
P25
/WAIT
P26
/RD
P27
/WR
P30
/INTO
P31
/INT1
P32
/TI0
P33
/TI2
No. of pins
8
8
4
1
1
1
1
1
1
1
1
Table 2.2 Pin Names and Functions (1/2)
I/O 3 states
I/O
3 states
I/O
Output
I.O
I/O
Input
Function
Port 0: 8-bit I/O port that allows selection of input/output on byte basis
Address/Data bus: Functions as 8-bit bidirectional address/data bus for external memory (For 401, fixed to
address/data bus)
Port 1: 8-bit I/O port that allows selection on byte basis
Address bus: Functions as address bus (upper 8 bits) by EXT1 set for external memory (For 401, fixed to
address bus
Port 20 ~ 23: 4-bit I/O port with a pull-up resistor that can be programmed, and allows selection of
input/output on bit basis
Port 24: 1-bit I/O port with a pull-up resistor that can be programmed, and allows selection of
input/output on bit basis
Non-maskable interrupt request pin: Falling edge interrupt register pin
I/O
Input
Output
Output
Output
Output
I/O
Input
Port 25: 1-bit I/O port with a pull-up resistor that can be programmed, and allows selection of input/output on
bit basis
Wait: Input pin for connecting slow speed memory of peripheral LSI
Port 26: 1-bit output port
Read: Generates strobe signal for reading external memory (For 401, fixed to RD)
Port 27: 1-bit output port
Read: Generates strobe signal for writing into external memory (For 401, fixed to WR)
Port 30: 1-bit I/O port with a pull-up resistor that can be programmed, and allows selection of input/output on
bit basis
Interrupt request pin 0: Interrupt request pin (Level/rising edge is programmable)
Port 31: 1-bit I/O port with a pull-up resistor that can be programmed, and allows selection of input/output on
bit basis
Input Interrupt request pin 1: Rising edge interrupt request pin
I/O
Input
Output
Port 32: 1-bit I/O port with a pull-up resistor that can be programmed, and allows selection of input/output on
bit basis
Timer input 0: Counter input pin for Timer 0
Port 33: 1-bit I/O port with a pull-up resistor that can be programmed, and allows selection of input/output on
bit basis
Timer input 2: Counter input pin for Timer 2
TOSHIBA CORPORATION
5/14
5 Page 
TMP90C800/801
4.3 AC Characteristics
Symbol
Parameter
Variable
Min Max
tOSC
tCYC
tWH
tWL
tAL
tLA
tLL
tLC
tCL
tACL
tACH
tCA
tADL
tADH
tRD
tRR
tHR
tRAE
tWW
tDW
tWD
tACKH
tACKL
tCKHA
tCCK
tCKHC
tDCK
tCWA
tAWAL
tWAH
tAWAH
tCPW
tPRC
tCPR
Oscillation cycle ( = x)
CLK Period
CLK High width
CLK Low width
A0 ~ 7 effective address→ALE fall
ALE fall →A0 ~ 7 hold
ALE Pulse width
ALE fall RD/WR fall
RD/WR →ALE rise
A0 ~ 7 effective address →RD/WR fall
Upper effective address →RD/WR fall
RD/WR fall →Upper address hold
A0 ~ 7 effective address →Effective data input
Upper effective address →Effective data input
RD fall →Effective data input
RD Pulse width
RD rise →Data hold
RD rise→ Address enable
WR pulse width
Effective data→WR rise
WR rise→Effective data hold
Upper address→CLK fall
Lower address →CLK fall
CLK fall→Upper address hold
RD/WR→CLK fall
CLK fall→RD/WR rise
Valid data CLK fall
RD/WR fall→Valid WAIT
Lower address →Valid WAIT
CLK fall →Valid WAIT hold
Upper address →Valid WAIT
CLK fall →Port Data Output
Port Data Input →CLK fall
CLK fall →Port Data hold
80
4x
2x - 40
2x - 40
0.5x - 15
0.5x - 15
x - 40
0.5x - 30
0.5x - 20
x - 25
1.5x - 50
0.5x - 20
–
–
–
2.0x - 40
0
x - 15
2.0x - 40
2.0x - 50
0.5x - 10
2.5x - 50
2.0x - 50
1.5x - 80
x - 25
x - 60
x - 50
–
–
0
–
–
200
100
1000
4x
–
–
–
–
–
–
–
–
–
–
3.0x - 35
3.5x - 55
2.0x - 50
–
–
–
–
–
–
–
–
–
–
–
–
x - 40
2.0x - 70
–
2.5x - 70
x + 200
–
–
AC Measuring Conditions
• Output level: High 2.2V/Low 0.8V, CL = 50pF
(However, CL = 100pF for AD0 ~ 7, A8 ~ 15, ALE, RD, WR)
• Input level: High 2.4V/Low 0.45V (AD0 ~ AD7)
High 0.8VCC/Low 0.2VCC (excluding AD0 ~ AD7)
VCC = 5V ± 10% TA = -40 ~ 85°C (1 ~ 10MHz)
CL = 50pF TA = -20 ~ 70°C (1 ~ 12.5MHz)
10MHz Clock
Min Max
12.5MHz Clock
Min Max
Unit
100 – 80 – ns
400 – 320 – ns
160 – 120 – ns
160 – 120 – ns
35 – 25 – ns
35 – 25 – ns
60 – 40 – ns
20 – 10 – ns
30 – 20 – ns
75 – 55 – ns
100 – 70 – ns
30 – 20 – ns
– 265 – 205 ns
– 295 – 225 ns
– 150 – 110 ns
160 – 120 – ns
0 – 0 – ns
85 – 65 – ns
160 – 120 – ns
150 – 110 – ns
40 – 30 – ns
200 – 150 – ns
150 – 110 – ns
70 – 40 – ns
75 – 55 – ns
40 – 20 – ns
50 – 30 – ns
– 60 – 40 ns
– 130 –
90 ns
0 – 0 – ns
– 180 – 130 ns
– 300 – 280 ns
200 – 200 – ns
100 – 100 – ns
TOSHIBA CORPORATION
11/14
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet TMP90C801.PDF ] | |
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