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PDF MTD20N06HDL Data sheet ( Hoja de datos )
| Número de pieza | MTD20N06HDL | |
| Descripción | TMOS POWER FET LOGIC LEVEL 20 AMPERES 60 VOLTS RDS(on) = 0.045 OHM | |
| Fabricantes | Motorola Semiconductors | |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
bt MTD20N06HDL/D
Advance Information
HDTMOS E-FETā™
High Density Power FET
DPAK for Surface Mount or
Insertion Mount
N–Channel Enhancement–Mode Silicon Gate
This advanced high–cell density HDTMOS E–FET is designed to
withstand high energy in the avalanche and commutation modes.
The new energy efficient design also offers a drain–to–source
diode with a fast recovery time. Designed for low–voltage,
high–speed switching applications in power supplies, converters
and PWM motor controls, these devices are particularly well suited
for bridge circuits, and inductive loads. The avalanche energy
capability is specified to eliminate the guesswork in designs where
inductive loads are switched, and to offer additional safety margin
against unexpected voltage transients.
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
• Surface Mount Package Available in 16 mm, 13–inch/2500
Unit Tape & Reel, Add T4 Suffix to Part Number
• Available in Insertion Mount, Add –1 or 1 to Part Number
G
™
D
S
MTD20N06HDL
Motorola Preferred Device
TMOS POWER FET
LOGIC LEVEL
20 AMPERES
60 VOLTS
RDS(on) = 0.045 OHM
CASE 369A–13, Style 2
DPAK
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Drain–Source Voltage
VDSS
Drain–Gate Voltage (RGS = 1.0 MΩ)
VDGR
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms)
VGS
VGSM
Drain Current — Continuous @ 25°C
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
ID
ID
IDM
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ TC = 25°C (1)
PD
Operating and Storage Temperature Range
TJ, Tstg
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 5.0 Vdc, IL = 20 Apk, L = 1.0 mH, RG = 25 Ω)
EAS
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient (1)
RθJC
RθJA
RθJA
Maximum Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
TL
(1) When surface mounted to an FR–4 board using the minimum recommended pad size.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
E–FET and HDTMOS are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
Value
60
60
± 15
± 20
20
12
60
40
0.32
1.75
– 55 to 150
200
3.13
100
71.4
260
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/°C
Watts
°C
mJ
°C/W
°C
REV 1
©MMoottoororolal,aInTc.M19O9S6 Power MOSFET Transistor Device Data
1
1 page  
12
QT
10
60
50
8 VDS
VGS 40
6
Q1
4
30
Q2 ID = 20 A
TJ = 25°C 20
2 Q3
10
00
0 2 4 6 8 10 12 14 16
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate–To–Source and Drain–To–Source
Voltage versus Total Charge
1000
VDD = 30 V
ID = 20 A
VGS = 5 V
TJ = 25°C
100
tr
tf
td(off)
10 td(on)
MTD20N06HDL
1
1 10 100
RG, GATE RESISTANCE (Ohms)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
The switching characteristics of a MOSFET body diode
are very important in systems using it as a freewheeling or
commutating diode. Of particular interest are the reverse re-
covery characteristics which play a major role in determining
switching losses, radiated noise, EMI and RFI.
System switching losses are largely due to the nature of
the body diode itself. The body diode is a minority carrier de-
vice, therefore it has a finite reverse recovery time, trr, due to
the storage of minority carrier charge, QRR, as shown in the
typical reverse recovery wave form of Figure 10. It is this
stored charge that, when cleared from the diode, passes
through a potential and defines an energy loss. Obviously,
repeatedly forcing the diode through reverse recovery further
increases switching losses. Therefore, one would like a
diode with short trr and low QRR specifications to minimize
these losses.
The abruptness of diode reverse recovery effects the
amount of radiated noise, voltage spikes, and current ring-
ing. The mechanisms at work are finite irremovable circuit
parasitic inductances and capacitances acted upon by high
di/dts. The diode’s negative di/dt during ta is directly con-
trolled by the device clearing the stored charge. However,
the positive di/dt during tb is an uncontrollable diode charac-
teristic and is usually the culprit that induces current ringing.
Therefore, when comparing diodes, the ratio of tb/ta serves
as a good indicator of recovery abruptness and thus gives a
comparative estimate of probable noise generated. A ratio of
1 is considered ideal and values less than 0.5 are considered
snappy.
Compared to Motorola standard cell density low voltage
MOSFETs, high cell density MOSFET diodes are faster
(shorter trr), have less stored charge and a softer reverse re-
covery characteristic. The softness advantage of the high
cell density diode means they can be forced through reverse
recovery at a higher di/dt than a standard cell MOSFET
diode without increasing the current ringing or the noise gen-
erated. In addition, power dissipation incurred from switching
the diode will be less due to the shorter recovery time and
lower switching losses.
20
VGS = 0 V
TJ = 25°C
16
12
8
4
0
0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.9 0.95
VSD, SOURCE–TO–DRAIN VOLTAGE (Volts)
Figure 10. Diode Forward Voltage versus Current
Motorola TMOS Power MOSFET Transistor Device Data
5
5 Page 
PACKAGE DIMENSIONS
V
S
F
–T–
SEATING
PLANE
BC
RE
Z
A
U
K
J
LH
D 2 PL
G 0.13 (0.005) M T
STYLE 2:
PIN 1.
2.
3.
4.
GATE
DRAIN
SOURCE
DRAIN
CASE 369A–13
ISSUE W
MTD20N06HDL
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
INCHES
DIM MIN MAX
A 0.235 0.250
B 0.250 0.265
C 0.086 0.094
D 0.027 0.035
E 0.033 0.040
F 0.037 0.047
G 0.180 BSC
H 0.034 0.040
J 0.018 0.023
K 0.102 0.114
L 0.090 BSC
R 0.175 0.215
S 0.020 0.050
U 0.020 –––
V 0.030 0.050
Z 0.138 –––
MILLIMETERS
MIN MAX
5.97 6.35
6.35 6.73
2.19 2.38
0.69 0.88
0.84 1.01
0.94 1.19
4.58 BSC
0.87 1.01
0.46 0.58
2.60 2.89
2.29 BSC
4.45 5.46
0.51 1.27
0.51 –––
0.77 1.27
3.51 –––
Motorola TMOS Power MOSFET Transistor Device Data
11
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| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MTD20N06HDL.PDF ] | |
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