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PDF STLC5444 Data sheet ( Hoja de datos )
| Número de pieza | STLC5444 | |
| Descripción | QUAD FEEDER POWER SUPPLY | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de STLC5444 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
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STLC5444
QUAD FEEDER POWER SUPPLY
SUPPLIES POWER FOR UP TO FOUR DIGI-
TAL TELEPHONE LINES
CONFORMS TO THE CCITT RECOMMEN-
DATIONS FOR POWER FEED AT THE S OR
T REFERENCE POINTS
SUPPORTS POINT-TO-POINT AND POINT
TO MULTIPOINT CONFIGURATIONS
EACH OF THE FOUR LINES IS INDIVIDU-
ALLY CONTROLLED
HIGH-VOLTAGE BCD TECHNOLOGY SUP-
PORTING UP TO -130V
AUTOMATIC THERMAL SHUTDOWN
STATUS CONDITION DETECTION (BY MI-
CROPROCESSOR) FOR EACH LINE:
– Low output voltage
– Openloop
– Current overload
– Thermal overload
– Normal line condition
PROGRAMMABLE CURRENT LIMITING
OUTPUT CURRENT UP TO 120mA
DIP24
PLCC44
ORDERING NUMBERS: STLC5444B1 (DIP24)
STLC5444FN (PLCC44)
DIP24 PIN CONNECTION (Top view)
DESCRIPTION
The ISDN Quad Feeder Power Supply (IQFPS)
provides a power source for up to four line inter-
faces. The power source to the device is a local
battery or a centralized regulated power supply.
It can operate in point-to-point and point-to-mul-
tipoint configurations as far as S interface is con-
cerned.
By the device microprocessor interface, each
powered line is individually controlled and moni-
tored.
Therefore, overloads and faults are easy to detect
and localize even in a large system.
The status conditions detected by the device on
each line that may be read by the microprocessor
are :
low output voltage
openloop
current overload
thermal overload
normal line conditions
A hardware current limiting programmable feature
is available.
D1
D0
INT
BGND
VCC
ILIM
N.C.
VBB
N.C.
S0
S1
VBB
1
2
3
4
5
6
7
8
9
10
11
12
24 D2
23 D3
22 A0
21 DGND
20 ALE
19 WR
18 CS
17 RD
16 RESET
15 S3
14 RSRVD
13 S2
D94TL102
December 1997
1/17
1 page  
STLC5444
DC CHARACTERISTICS (VBB = -54V; VCC = 5V; unless otherwise specified)
Symbol
Parameter
Test Conditions
VIH Input Voltage High Level
VIL Input Voltage Low Level
IOH High Level Output Current
VOH = 2.4V
IOL Low Level Output Current
IIH High Level Input Current
VOL = 0.4V
VIH = 2V
IIL Low Level Input Current
VIL = 0.8V
IOZH Output Hi-Z Current High
2.4V < VOZ < VCC
IOZL
ICC
CL
VSAT
Ron
IBB
Output Hi-Z Current Low
VCC supply Current
Logic I/O Capacitance
0V < VOZ < 0.4V
Saturation Voltage
IS = 80mA
Output DMOS Saturation Resistivity IS = 80mA
VBB Supply Current
VBB = -54V, RLIM = 26.6KΩ,
Output Disabled
∆ISLIM
Delta Limit Current vs.
Theoretical Programmed Value
ISLIM
RLIM = 26.6KΩ, VBB = -96V
RLIM = 10.9KΩ, VBB = -54V
VLVD
Low Voltage Detector Threshold S3 - S0 output active
(relative to VBB)
ISOL Current Overload Detector
Threshold (as % of ISLIM)
ISOC Open Loop Detector Threshold
ISZ Si Leakage Current to ground @ VBB = -110V
Si disabled
HLVD
HOLD
HCOD
Low Voltage Detector Hysteresis
Open Loop Detector Hysteresis
Current Overload Detector
Hysteresis
H1 130°C Thermal Detector
Hysteresis
H2 160°C Thermal Detector
Hysteresis
TH1 Thermal Overload Recovery
Time H1
Min.
2
400
2
2.7
75
1.5
Typ. Max.
0.8
10
60
10
10
1.4 5
10
2
25
3.2 6
±10%
3 3.3
90
34
100
18 200
0.6 1.6
2.4 4.0
10
10
80
Unit
V
V
µA
mA
µA
µA
µA
µA
mA
pF
V
Ω
mA
V
%
mA
µA
mV
mA
mA
°C
°C
µs
5/17
5 Page 
STLC5444
The contents and format of the status groups and the LER are as follows :
LVD:
Bit
Logical 1
Logical 0 (default value)
0
O0 low voltage
O0 voltage normal
1
O1 low voltage
O1 voltage normal
2
O2 low voltage
O2 voltage normal
3
O3 low voltage
O3 voltage normal
The Low Voltage Detector (LVD) indicates the voltage level on the output lines, even when the lines are
disabled. The low-voltage condition becomes active (logical 1) if the output reaches the Low Voltage
Threshold (VLVD).
LEC:
Bit
Logical 1
Logical 0
0
SWITCH ON
SWITCH OFF
1
SWITCH ON
SWITCH OFF
2
SWITCH ON
SWITCH OFF
3
SWITCH ON
SWITCH OFF
The Line Enable Command (LEC) indicates the status of the DMOS SWITCH OUTPUT.
OLD:
Bit
Logical 1
Logical 0 (default value)
0
O0 open loop
O0 current normal
1
O1 open loop
O1 current normal
2
O2 open loop
O2 current normal
3
O3 open loop
O3 current normal
The Open Loop Detector (OLD) indicates the open-loop condition on the output lines. The open-loop
condition becomes active (logical 1) if the current on the line drops below the threshold value ISOC.
COD:
Bit
Logical 1
Logical 0 (default value)
0
O0 current overload
O0 current normal
1
O1 current overload
O1 current normal
2
O2 current overload
O2 current normal
3
O3 current overload
O3 current normal
The Current Overload Detector (COD) indicates the current-overload condition on the output lines. The
overload condition becomes active (logical 1) if the output current approaches the value programmed by
an external resistor between ILIM and VBB.
TOR :
Bit
Logical 1 (default value)
Logical 0
0
O0 operational
O0 off
1
O1 operational
O1 off
2
O2 operational
O2 off
3
O3 operational
O3 off
The Thermal Overload Register (TOR) contains the overload status of the output line drivers. If the de-
vice temperature reaches 130oC, then the output line drivers that are in the current-overload condition
will be switched off. The corresponding bits in the TOR will be set to a logical 0. To initialize any of the
bits in the TOR, the microprocessor must first turn off the output line drivers via the LER. However, the
TOR bits cannot be deactivated if the 160oC detector is active. The µp may re-enable the output drivers
via the LER after the TOR condition is removed. The TOR is a read-only register.
11/17
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet STLC5444.PDF ] | |
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