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PDF ISL6522A Data sheet ( Hoja de datos )

Número de pieza ISL6522A
Descripción Buck and Synchronous Rectifier Pulse-Width Modulator (PWM) Controller
Fabricantes Intersil Corporation 
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®
Data Sheet
July 2003
ISL6522A
FN9122.1
Buck and Synchronous Rectifier
Pulse-Width Modulator (PWM) Controller
The ISL6522A provides complete control and protection for a
DC-DC converter optimized for high-performance
microprocessor applications. It is designed to drive two
N-Channel MOSFETs in a synchronous rectified buck
topology. The ISL6522A integrates all of the control, output
adjustment, monitoring and protection functions into a single
package.
The output voltage of the converter can be precisely
regulated to as low as 0.8V, with a maximum tolerance of
±0.5% over temperature and line voltage variations.
The ISL6522A provides simple, single feedback loop,
voltage-mode control with fast transient response. It includes
a 200kHz free-running triangle-wave oscillator that is
adjustable from below 50kHz to over 1MHz. The error
amplifier features a 15MHz gain-bandwidth product and
6V/µs slew rate which enables high converter bandwidth for
fast transient performance. The resulting PWM duty ratio
ranges from 0–100%.
The ISL6522A protects against overcurrent conditions by
inhibiting PWM operation. The ISL6522A monitors the
current by using the rDS(ON) of the upper MOSFET which
eliminates the need for a current sensing resistor.
Pinout
ISL6522ACR (16 LEAD QFN)
TOP VIEW
16 15 14 13
SS 1
COMP 2
FB 3
12 PVCC
11 LGATE
10 PGND
EN 4
9 BOOT
5678
Features
• Drives two N-Channel MOSFETs
• Operates from +5V or +12V input
• Simple single-loop control design
- Voltage-mode PWM control
• Fast transient response
- High-bandwidth error amplifier
- Full 0–100% duty ratio
• Excellent output voltage regulation
- 0.8V internal reference
- ±0.5% over line voltage and temperature
• Overcurrent fault monitor
- Does not require extra current sensing element
- Uses MOSFETs rDS(ON)
• Converter can source and sink current
• Small converter size
- Constant frequency operation
- 200kHz free-running oscillator programmable from
50kHz to over 1MHz
• 16 Lead 5x5mm QFN Package
• QFN Package
- Compliant to JEDEC PUB95 MO-220 QFN-Quad Flat
No Leads-Product Outline.
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile
Applications
• Power supply for Pentium®, Pentium Pro, PowerPC® and
AlphaPC™ microprocessors
• High-power 5V to 3.xV DC-DC regulators
• Low-voltage distributed power supplies
Ordering Information
PART NUMBER
ISL6522ACR
TEMP.
RANGE (oC)
PACKAGE
25 to 70 16 Ld 5x5 QFN
PKG.
DWG. #
L16.5x5B
1 CCAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.

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ISL6522A pdf
ISL6522A
monitored by the adaptive shoot through protection circuitry to
determine when the lower MOSFET has turned off.
PVCC
Provide a bias supply for the lower gate drive to this pin.
VCC
Provide a 12V bias supply for the chip to this pin.
Functional Description
Initialization
The ISL6522A automatically initializes upon receipt of
power. Special sequencing of the input supplies is not
necessary. The Power-On Reset (POR) function continually
monitors the input supply voltages and the enable (EN) pin.
The POR monitors the bias voltage at the VCC pin and the
input voltage (VIN) on the OCSET pin. The level on OCSET
is equal to VIN less a fixed voltage drop (see overcurrent
protection). With the EN pin held to VCC, the POR function
initiates soft-start operation after both input supply voltages
exceed their POR thresholds. For operation with a single
+12V power source, VIN and VCC are equivalent and the
+12V power source must exceed the rising VCC threshold
before POR initiates operation.
The POR function inhibits operation with the chip disabled
(EN pin low). With both input supplies above their POR
thresholds, transitioning the EN pin high initiates a soft-start
interval.
Soft-Start
The POR function initiates the soft-start sequence. An internal
10µA current source charges an external capacitor (CSS) on
the SS pin to 4V. Soft-start clamps the error amplifier output
(COMP pin) to the SS pin voltage. Figure 3 shows the
soft-start interval. At t1 in Figure 3, the SS and COMP
voltages reach the valley of the oscillator’s triangle wave. The
oscillator’s triangular waveform is compared to the ramping
error amplifier voltage. This generates PHASE pulses of
increasing width that charge the output capacitor(s). This
interval of increasing pulse width continues to t2, at which
point the output is in regulation and the clamp on the COMP
pin is released. This method provides a rapid and controlled
output voltage rise.
5
VOLTAGE
VSOFT START
VOUT
VOSC(MIN)
VCOMP
CLAMP ON VCOMP
RELEASED AT STEADY STATE
t0 t1 t2
TIME
t1
=
C-----S----S--
ISS
VO
S
C
(
M
IN)
tSoftStart
=
t2 t1
=
-C----S----S--
ISS
-V----O----U----T----S----t--e---a---d----y---S----t-a----t--e-
VIN
VOS
C
Where:
CSS = Soft Start Capacitor
ISS = Soft Start Current = 10µA
VOSC(MIN) = Bottom of Oscillator = 1.35V
VIN = Input Voltage
VOSC = Peak to Peak Oscillator Voltage = 1.9V
VOUTSteadyState = Steady State Output Voltage
FIGURE 3. SOFT-START INTERVAL
4V
2V
0V
15A
10A
5A
0A
TIME (20ms/DIV)
FIGURE 4. OVERCURRENT OPERATION
Overcurrent Protection
The overcurrent function protects the converter from a
shorted output by using the upper MOSFETs on-resistance,
rDS(ON) to monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
The overcurrent function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (ROCSET)
programs the overcurrent trip level. An internal 200µA
(typical) current sink develops a voltage across ROCSET that

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ISL6522A arduino
ISL6522A
Quad Flat No-Lead Plastic Package (QFN)
Micro Lead Frame Plastic Package (MLFP)
L16.5x5B
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220VHHB ISSUE C)
FN
SYMBOL
A
A1
A2
A3
b
D
D1
MILLIMETERS
MIN NOMINAL MAX
0.80 0.90 1.00
- - 0.05
- - 1.00
0.20 REF
0.28 0.33 0.40
5.00 BSC
4.75 BSC
NOTES
-
-
9
9
5, 8
-
9
D2 2.95 3.10 3.25 7, 8
E
5.00 BSC
-
E1
4.75 BSC
9
E2 2.95 3.10 3.25 7, 8
e
0.80 BSC
-
k
0.25 -
--
L 0.35 0.60 0.75 8
L1 - - 0.15 10
N 16 2
Nd 4 3
Ne 4 3
P - - 0.60 9
θ - - 12 9
Rev. 1 10/02
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land Pattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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