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PDF ISL6522 Data sheet ( Hoja de datos )
| Número de pieza | ISL6522 | |
| Descripción | Buck and Synchronous Rectifier Pulse-Width Modulator (PWM) Controller | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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FORDRNO®EPW-INDEESNDIHGaAtNaNSSC, hIENeDTeEPtRRSOILDURCETCO- IMSML6E5N3D5S
March 10, 2006
ISL6522
FN9030.8
Buck and Synchronous Rectifier
Pulse-Width Modulator (PWM) Controller
The ISL6522 provides complete control and protection for a
DC-DC converter optimized for high-performance micro-
processor applications. It is designed to drive two N-Channel
MOSFETs in a synchronous rectified buck topology. The
ISL6522 integrates all of the control, output adjustment,
monitoring and protection functions into a single package.
The output voltage of the converter can be precisely
regulated to as low as 0.8V, with a maximum tolerance of
±1% over temperature and line voltage variations.
The ISL6522 provides simple, single feedback loop, voltage-
mode control with fast transient response. It includes a
200kHz free-running triangle-wave oscillator that is
adjustable from below 50kHz to over 1MHz. The error
amplifier features a 15MHz gain-bandwidth product and
6V/µs slew rate which enables high converter bandwidth for
fast transient performance. The resulting PWM duty ratio
ranges from 0–100%.
The ISL6522 protects against overcurrent conditions by
inhibiting PWM operation. The ISL6522 monitors the current
by using the rDS(ON) of the upper MOSFET which eliminates
the need for a current sensing resistor.
Features
• Drives two N-Channel MOSFETs
• Operates from +5V or +12V input
• Simple single-loop control design
- Voltage-mode PWM control
• Fast transient response
- High-bandwidth error amplifier
- Full 0–100% duty ratio
• Excellent output voltage regulation
- 0.8V internal reference
- ±1% over line voltage and temperature
• Overcurrent fault monitor
- Does not require extra current sensing element
- Uses MOSFETs rDS(ON)
• Converter can source and sink current
• Small converter size
- Constant frequency operation
- 200kHz free-running oscillator programmable from
50kHz to over 1MHz
• 14-lead SOIC and TSSOP package and 16-lead 5x5mm
QFN Package
Pinouts
SOIC, TSSOP
TOP VIEW
RT 1
OCSET 2
SS 3
COMP 4
FB 5
EN 6
GND 7
14 VCC
13 PVCC
12 LGATE
11 PGND
10 BOOT
9 UGATE
8 PHASE
• QFN Package
- Compliant to JEDEC PUB95 MO-220 QFN-Quad Flat
No Leads-Product Outline.
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile
• Pb-free plus anneal available (RoHS compliant)
Applications
• Power supply for Pentium®, Pentium Pro, PowerPC® and
AlphaPC™ microprocessors
QFN
TOP VIEW
• High-power 5V to 3.xV DC-DC regulators
• Low-voltage distributed power supplies
16 15 14 13
SS 1
COMP 2
FB 3
EN 4
GND
12 PVCC
11 LGATE
10 PGND
9 BOOT
5678
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2001, 2002, 2004-2006. All Rights Reserved
PowerPC® is a trademark of IBM. AlphaPC™ is a trademark of Digital Equipment Corporation. Pentium® is a registered trademark of Intel Corporation.
1 page  
ISL6522
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP
Upper Gate Sink
Lower Gate Source
Lower Gate Sink
PROTECTION
RUGATE
ILGATE
RLGATE
ISL6522C, ILGATE = 0.3A
ISL6522I, ILGATE = 0.3A
VCC = 12V, VLGATE = 6V
ISL6522C, ILGATE = 0.3A
ISL6522I, ILGATE = 0.3A
- 5.5
- 5.5
300 450
- 3.5
- 3.5
OCSET Current Source
Soft-Start Current
IOCSET
ISS
VOCSET = 4.5VDC
170 200
- 10
MAX
10
7.2
-
6.5
4.5
230
-
UNITS
Ω
Ω
mA
Ω
Ω
µA
µA
Typical Performance Curves
1000
100
10
RT PULLUP
TO +12V
RT PULLDOWN
TO VSS
10 100
SWITCHING FREQUENCY (kHz)
FIGURE 1. RT RESISTANCE vs FREQUENCY
1000
80
70
60
CGATE = 3300pF
50
40
30 CGATE = 1000pF
20
10 CGATE = 10pF
0
100 200 300 400 500 600 700 800 900 1000
SWITCHING FREQUENCY (kHz)
FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY
Functional Pin Descriptions
SOIC
and
TSSOP
RT 1
OCSET 2
SS 3
COMP 4
FB 5
EN 6
GND 7
14 VCC
13 PVCC
12 LGATE
11 PGND
10 BOOT
9 UGATE
8 PHASE
QFN
16 15 14 13
SS 1
COMP 2
FB 3
GND
12 PVCC
11 LGATE
10 PGND
EN 4
9 BOOT
5678
RT
This pin provides oscillator switching frequency adjustment.
By placing a resistor (RT) from this pin to GND, the nominal
200kHz switching frequency is increased according to the
following equation:
Fs ≈ 200kHz + 5-----•-R----1-T--0----6-
(RT to GND)
Conversely, connecting a pull-up resistor (RT) from this pin
to VCC reduces the switching frequency according to the
following equation:
Fs ≈ 200kHz – 4-----•-R----1-T--0----7-
(RT to 12V)
5 FN9030.8
March 10, 2006
5 Page 
ISL6522
switch realizes most of the switching losses when the converter
is sinking current (see the equations below).
Losses while Sourcing Current
PUPPER
=
I
o2
×
rD
S
(
O
N
)
×
D
+
1--
2
⋅
I
o
×
VI
N
×
tS
W
×
FS
PLOWER = Io2 x rDS(ON) x (1 - D)
Losses while Sinking Current
PUPPER = Io2 x rDS(ON) x D
PLOWER
=
Io2
×
rDS(ON)
×
(1
–
D)
+
1--
2
⋅
Io
×
VIN
×
tSW
×
FS
Where: D is the duty cycle = VOUT / VIN,
tSW is the switching interval, and
FS is the switching frequency.
These equations assume linear voltage-current transitions
and do not adequately model power loss due the reverse-
recovery of the upper and lower MOSFET’s body diode. The
gate-charge losses are dissipated by the ISL6522 and do not
heat the MOSFETs. However, large gate-charge increases
the switching interval, tSW which increases the upper
MOSFET switching losses. Ensure that both MOSFETs are
within their maximum junction temperature at high ambient
temperature by calculating the temperature rise according to
package thermal-resistance specifications. A separate
heatsink may be necessary depending upon MOSFET
power, package type, ambient temperature and air flow.
Standard-gate MOSFETs are normally recommended for
use with the ISL6522. However, logic-level gate MOSFETs
can be used under special circumstances. The input voltage,
upper gate drive level, and the MOSFETs absolute gate-to-
source voltage rating determine whether logic-level
MOSFETs are appropriate.
Figure 9 shows the upper gate drive (BOOT pin) supplied by
a bootstrap circuit from VCC . The boot capacitor, CBOOT
develops a floating supply voltage referenced to the PHASE
pin. This supply is refreshed each cycle to a voltage of VCC
less the boot diode drop (VD) when the lower MOSFET, Q2
turns on. A logic-level MOSFET can only be used for Q1 if
the MOSFETs absolute gate-to-source voltage rating
exceeds the maximum voltage applied to VCC. For Q2, a
logic-level MOSFET can be used if its absolute gate-to-
source voltage rating exceeds the maximum voltage applied
to PVCC.
+12V
VCC
ISL6522
-
+
DBOOT
+-
VD
+5V OR +12V
BOOT
UGATE
CBOOT
Q1
PHASE
NOTE:
VG-S ≈ VCC - VD
+5V
PVCC OR +12V
LGATE
PGND
Q2
D2
NOTE:
VG-S ≈ PVCC
GND
FIGURE 9. UPPER GATE DRIVE - BOOTSTRAP OPTION
Figure 10 shows the upper gate drive supplied by a direct
connection to VCC. This option should only be used in
converter systems where the main input voltage is +5VDC or
less. The peak upper gate-to-source voltage is approximately
VCC less the input supply. For +5V main power and +12VDC
for the bias, the gate-to-source voltage of Q1 is 7V. A logic-level
MOSFET is a good choice for Q1 and a logic-level MOSFET
can be used for Q2 if its absolute gate-to-source voltage rating
exceeds the maximum voltage applied to PVCC.
+12V
VCC
+5V OR LESS
ISL6522
-
+
BOOT
UGATE
PHASE
Q1
+5V
OR +12V
PVCC
LGATE
Q2
PGND
NOTE:
VG-S ≈ VCC - 5V
D2
NOTE:
VG-S ≈ PVCC
GND
FIGURE 10. UPPER GATE DRIVE - DIRECT VCC DRIVE OPTION
Schottky Selection
Rectifier D2 is a clamp that catches the negative inductor
swing during the dead time between turning off the lower
MOSFET and turning on the upper MOSFET. The diode must
be a Schottky type to prevent the lossy parasitic MOSFET
body diode from conducting. It is acceptable to omit the diode
and let the body diode of the lower MOSFET clamp the
negative inductor swing, but efficiency will drop one or two
percent as a result. The diode's rated reverse breakdown
voltage must be greater than the maximum input voltage.
11 FN9030.8
March 10, 2006
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet ISL6522.PDF ] | |
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