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PDF CXP5080 Data sheet ( Hoja de datos )
| Número de pieza | CXP5080 | |
| Descripción | CMOS 4-bit Single Chip Microcomputer | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXP5080
CMOS 4-bit Single Chip Microcomputer
Piggyback/
evaluator type
For the availability of this product, please contact the sales office.
Description
CXP5080 is a CMOS 4-bit single chip microcomputer
64 pin PSDIP (Ceramic) 64 pin PQFP (Ceramic)
of piggyback/evaluator combined type which has
been developed for functional evaluation of the
CXP5084/5086.
Features
• Instruction cycle 3.8µs/4.19MHz (CXP5080)
1.9µs/4.19MHz (CXP5080H)
• ROM capacity
Maximum 8K bytes (EPROM 27C64, LCC/DIP type 27C64)
• RAM capacity
400 × 4 bits (Including stack, display area)
• 32 general purpose I/O ports
• 16 large current output ports
• LCD controller/driver (Enables to direct drive)
— Enables to specify the segment output of 24, 20 and 16 optionally
— Enables to select program of the duty, 1/2, 1/3 and 1/4
— 1/3 bias
• 2 external interruption input pins
• 8-bit timer, 8-bit timer/event counter and 18-bit time base timer, independently controlled
• Arithmetic and logical operations possible between the entire RAM area, l/O area and the accumulator by
means of memory mapped I/O
• Reference to the entire ROM area is possible with the table look-up instruction
• 2 kinds of power down modes of sleep and stop
• Power on reset circuit (mask option)
• The oscillation circuit may be optionally specified as the crystal oscillation type or the CR oscillation type
• 64-pin ceramic SDIP/QFP
Note) Mask options are determined according to the CXP5080 category.
For details refer to the product list.
Structure
Silicon gate CMOS IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E61113A7Z-PS
1 page  
CXP5080
EPROM read timing
(Ta = –20 to +75°C, VDD = 4.5 to 5.5V, VSS = 0V reference)
Item
Symbol
Pin Min. Max. Unit
Address → Data
input delay time
Address → input
holding time
tACC
tIH
A0 to A12
I0 to I7
300 ns
A0 to A12
I0 to I7
0
ns
A0 to A12
0.8VDD
Address data
0.2VDD
tACC
tIH
I0 to I7
0.8VDD
Input data
0.2VDD
Products List
Optional item
Mask ROM
CXP5086
Package
64-pin plastic
SDIP/QFP
ROM capacity
6K byte
Speed
Standard/High speed
Oscillation type
Crystal/CR
Segment output 16/20/24
Output type
Tri-state/
Pull-up resistance/
Open drain
PY0 and PY1
output type
Pull-up resistance/
Inverter
Output state during
standby
Holding state/Hi-Z
Pull-up resistance
of reset pin
Existent/non-existent
Incorporated power
on reset circuit
Existent/non-existent
SOA pin output
Normal/Input
SOB pin output
Normal/Input
CXP5080HU02AS CXP5080HU03AS CXP5080HU04AS
CXP5080HU02AQ CXP5080HU03AQ CXP5080HU04AQ
64-pin ceramic
PSDIP/PQFP
64-pin ceramic
PSDIP/PQFP
64-pin ceramic
PSDIP/PQFP
EPROM 8K byte EPROM 8K byte EPROM 8K byte
High speed
High speed
High speed
Crystal
Crystal
Crystal
20 24 16
Tri-state
Tri-state
Tri-state
Pull-up resistance Pull-up resistance Pull-up resistance
Hi-Z Hi-Z Hi-Z
Existent
Existent
Existent
Existent
Input
Normal
Existent
Input
Normal
Existent
Input
Normal
Note) All of the above products are combined chips of piggyback and evaluator.
–5–
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet CXP5080.PDF ] | |
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