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PDF CY62158E Data sheet ( Hoja de datos )

Número de pieza CY62158E
Descripción 8-Mbit (1 M x 8) Static RAM
Fabricantes Cypress Semiconductor 
Logotipo Cypress Semiconductor Logotipo



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No Preview Available ! CY62158E Hoja de datos, Descripción, Manual

CY62158E MoBL®
8-Mbit (1 M × 8) Static RAM
8-Mbit (1 M × 8) Static RAM
Features
Very high speed: 45 ns
Wide voltage range: 4.5 V–5.5 V
Ultra low active power
Typical active current:1.8 mA at f = 1 MHz
Typical active current: 18 mA at f = fmax
Ultra low standby power
Typical standby current: 2 μA
Maximum standby current: 8 μA
Easy memory expansion with CE1, CE2 and OE features
Automatic power down when deselected
CMOS for optimum speed and power
Offered in Pb-free 44-pin TSOP II package
Functional Description
The CY62158E MoBL® is a high performance CMOS static RAM
organized as 1024K words by 8 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL) in portable
applications. The device also has an automatic power down
feature that significantly reduces power consumption. Placing
the device into standby mode reduces power consumption
significantly when deselected (CE1 HIGH or CE2 LOW).
To write to the device, take Chip Enables (CE1 LOW and CE2
HIGH) and Write Enable (WE) input LOW. Data on the eight I/O
pins (I/O0 through I/O7) is then written into the location specified
on the address pins (A0 through A19).
To read from the device, take Chip Enables (CE1 LOW and CE2
HIGH) and OE LOW while forcing the WE HIGH. Under these
conditions, the contents of the memory location specified by the
address pins appear on the I/O pins.
The eight input and output pins (I/O0 through I/O7) are placed in
a high impedance state when the device is deselected (CE1
HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or a
write operation is in progress (CE1 LOW and CE2 HIGH and WE
LOW). See the Truth Table on page 11 for a complete description
of read and write modes.
The CY62158E device is suitable for interfacing with processors
that have TTL I/P levels. It is not suitable for processors that
require CMOS I/P levels. Please see Electrical Characteristics
on page 4 for more details and suggested alternatives.
For a complete list of related documentation, click here.
Logic Block Diagram
CE1
CE2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
WE
OE
DATA IN DRIVERS
1024K x 8
ARRAY
COLUMN DECODER
POWER
DOWN
IIO/O00
IIO/O11
IIO/O22
IIO/O33
IIO/O44
IIO/O55
IIO/O66
IIO/O77
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 38-05684 Rev. *L
• San Jose, CA 95134-1709 • 408-943-2600
Revised July 20, 2015

1 page




CY62158E pdf
CY62158E MoBL®
Capacitance
Parameter [9]
Description
CIN
COUT
Input capacitance
Output capacitance
Thermal Resistance
Parameter [9]
Description
ΘJA Thermal resistance
(junction to ambient)
ΘJC Thermal resistance
(junction to case)
Test Conditions
TA = 25 °C, f = 1 MHz, VCC = VCC(typ)
Max Unit
10 pF
10 pF
Test Conditions
44-pin TSOP II Unit
Still Air, soldered on a 3 × 4.5 inch, four-layer printed circuit
board
55.84
°C/W
15.79
°C/W
AC Test Loads and Waveforms
Figure 2. AC Test Loads and Waveforms
VCC
OUTPUT
R1
100 pF
INCLUDING
JIG AND
SCOPE
ALL INPUT PULSES
R2
3V
GND
10%
90%
90%
10%
Fall Time = 1 V/ns
Rise Time = 1 V/ns
Equivalent to: THÉVENIN EQUIVALENT
OUTPUT
RTH
VTH
Parameters
R1
R2
RTH
VTH
5.0 V
1838
994
645
1.75
Unit
Ω
Ω
Ω
V
Note
9. Tested initially and after any design or process changes that may affect these parameters.
Document Number: 38-05684 Rev. *L
Page 5 of 17

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CY62158E arduino
CY62158E MoBL®
Truth Table
CE1
H
X[30]
L
L
L
CE2
X[30]
L
H
H
H
WE
X
X
H
H
L
OE Inputs/Outputs
X High Z
X High Z
L Data Out
H High Z
X Data in
Mode
Deselect/Power Down
Deselect/Power Down
Read
Output Disabled
Write
Power
Standby (ISB)
Standby (ISB)
Active (ICC)
Active (ICC)
Active (ICC)
Note
30. The ‘X’ (Don’t care) state for the Chip enables in the truth table refer to the logic state (either HIGH or LOW). Intermediate voltage levels on these pins is not permitted.
Document Number: 38-05684 Rev. *L
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