|
|
PDF CY62158CV33 Data sheet ( Hoja de datos )
| Número de pieza | CY62158CV33 | |
| Descripción | (CY62158CV25 - CY62158CV33) 1024K x 8 MoBL Static RAM | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de CY62158CV33 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
CY62158CV25/30/33
MoBL™
Features
• High Speed
— 55 ns and 70 ns availability
• Voltage range:
— CY62158CV25: 2.2V–2.7V
— CY62158CV30: 2.7V–3.3V
— CY62158CV33: 3.0V–3.6V
• Ultra low active power
— Typical active current: 1.5 mA @ f = 1 MHz
— Typical active current: 5.5 mA @ f = fmax(70 ns speed)
• Low standby power
• Easy memory expansion with CE1, CE2 and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
Functional Description
The CY62158CV25/30/33 are high-performance CMOS static
RAMs organized as 1024K words by 8 bits. This device fea-
tures advanced circuit design to provide ultra-low active cur-
rent. This is ideal for providing More Battery Life™ (MoBL™)
Logic Block Diagram
1024K x 8 MoBL Static RAM
in portable applications such as cellular telephones. The de-
vice also has an automatic power-down feature that signifi-
cantly reduces power consumption by 80% when addresses
are not toggling. The device can be put into standby mode
reducing power consumption by more than 99% when dese-
lected (CE1 HIGH or CE2 LOW).
Writing to the device is accomplished by taking Chip Enable 1
(CE1) and Write Enable (WE) inputs LOW and Chip Enable 2
(CE2) HIGH. Data on the eight I/O pins (I/O0 through I/O7) is
then written into the location specified on the address pins (A0
through A19).
Reading from the device is accomplished by taking Chip En-
able 1 (CE1) and Output Enable (OE) LOW and Chip Enable
2 (CE2) HIGH while forcing Write Enable (WE) HIGH. Under
these conditions, the contents of the memory location speci-
fied by the address pins will appear on the I/O pins.
The eight input/output pins (I/O0 through I/O7) are placed in a
high-impedance state when the device is deselected (CE1
LOW and CE2 HIGH), the outputs are disabled (OE HIGH), or
during a write operation (CE1 LOW and CE2 HIGH and WE
LOW).
The CY62158CV25/30/33 are available in a 48-ball FBGA
package.
AAAAAAAAAAAAA1119121234507086
Data in Drivers
1024K x 8
ARRAY
CE1
CE2
WE
OE
COLUMN
DECODER
POWER
DOWN
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-05019 Rev. *C
Revised April 24, 2002
1 page  
www.DataSheet4U.com
CY62158CV25/30/33
MoBL™
AC Test Loads and Waveforms
VCC
OUTPUT
R1
30 pF
R2
INCLUDING
JIG AND
SCOPE
VCC Typ
GND
10%
Rise Time: 1 V/ns
ALL INPUT PULSES
90%
90%
10%
Fall time: 1 V/ns
Equivalent to:
THÉVENIN EQUIVALENT
OUTPUT
RTH
VTH
Parameters
R1
R2
RTH
VTH
2.5V
16.6
15.4
8.0
1.20
3.0V
1.105
1.550
0.645
1.75
Data Retention Characteristics (Over the Operating Range)
Parameter
VDR
ICCDR
tCDR[5]
tR[6]
Description
VCC for Data Retention
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery
Time
Conditions
VCC = 1.5V
CE1 > VCC − 0.2V or CE2 <0.2V
VIN > VCC − 0.2V or VIN < 0.2V
Data Retention Waveform
3.3V
1.216
1.374
0.645
1.75
Min.
1.5
Typ.[4]
4
0
tRC
Unit
K Ohms
K Ohms
K Ohms
Volts
Max.
Vccmax
20
Unit
V
µA
ns
ns
VCC
CE1
or
CE2
VCC(min)
tCDR
DATA RETENTION MODE
VDR > 1.5 V
VCC(min)
tR
Note:
6. Full Device AC operation requires linear VCC ramp from VDR to VCC(min.) > 100 µs or stable at VCC(min.) > 100 µs.
Document #: 38-05019 Rev. *C
Page 5 of 12
5 Page 
www.DataSheet4U.com
Ordering Information
Speed
(ns)
70
55
Ordering Code
CY62158CV25LL-70BAI
CY62158CV30LL-70BAI
CY62158CV33LL-70BAI
CY62158CV30LL-55BAI
CY62158CV33LL-55BAI
Package Diagrams
Package
Name
BA48F
CY62158CV25/30/33
MoBL™
Package Type
48-Ball Fine Pitch BGA
Operating
Range
Industrial
48-Ball (6 mm x 10 mm x 1.2 mm) FBGA BA48F
51-85128-*B
MoBL, MoBL2 and More Battery Life are trademarks of Cypress Semiconductor Corporation. All product and company names
mentioned in this document may be the trademarks of their respective holders.
Document #: 38-05019 Rev. *C
Page 11 of 12
© Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet CY62158CV33.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| CY62158CV30 | (CY62158CV25 - CY62158CV33) 1024K x 8 MoBL Static RAM | Cypress Semiconductor |
| CY62158CV33 | (CY62158CV25 - CY62158CV33) 1024K x 8 MoBL Static RAM | Cypress Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |