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PDF APW8861 Data sheet ( Hoja de datos )

Número de pieza APW8861
Descripción DDR3 AND DDR4 SYNCHRONOUS BUCK CONTVERTER
Fabricantes ANPEC 
Logotipo ANPEC Logotipo



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No Preview Available ! APW8861 Hoja de datos, Descripción, Manual

APW8861
DDR3 AND DDR4 SYNCHRONOUS BUCK CONTVERTER
WITH 1.5A LDO
Features
General Description
Buck Controller (VDDQ)
High Input Voltages Range from 4.5V to 26V Input
Power
Provide Adjustable Output Voltage from 0.75V to
3.3V
Integrated MOSFET Drivers and Bootstrap Forward
P-CH MOSFET
Low Quiescent Current (200uA)
Excellent Load Transient Responses
PFM Mode for Increased Light Load Efficiency
Constant On-Time Controller Scheme
- Switching Frequency Compensation for PWM
Mode
- Adjustable Switching Frequency from 400kHz to
550kHz in PWM Mode with DC Output Current
S3 and S5 Pins Control The Device in S0, S3 or S4/
S5 State
Power Good Monitoring
70% Under-Voltage Protection (UVP)
125% Over-Voltage Protection (OVP)
Adjustable Current-Limit Protection
- Using Sense Low-Side MOSFET’s RDS(ON)
TQFN-32 4mmx4mm Thin package
Lead Free Available (RoHS Compliant)
+1.5A LDO Section (VTT)
Souring or Sinking Current up to 1.5A
Fast Transient Response for Output Voltage
Output Ceramic Capacitors Support at least 10µF
MLCC
VTT and VTTREF Track at Half the VDDQSNS by
internal divider
+20mV Accuracy for VTT and VTTREF
Independent Over-Current Limit (OCL)
Thermal Shutdown Protection
The APW8861 integrates a synchronous buck PWM con-
verter to generate VDDQ, a sourcing and sinking LDO
linear regulator to generate VTT. It offers the lowest total
solution cost in system where space is at a premium.
The APW8861 provides excellent transient response and
accurate DC voltage output in either PFM or PWM Mode.
In Pulse Frequency Mode (PFM), the APW8861 provides
very high efficiency over light to heavy loads with loading-
modulated switching frequencies. On TQFN-32 Package,
the Forced PWM Mode works nearly at constant frequency
for low-noise requirements.
The APW8861 is equipped with accurate current-limit,
output under-voltage, and output over-voltage protections.
A Power-On- Reset function monitors the voltage on VCC
prevents wrong operation during power on.
The LDO is designed to provide a regulated voltage with
bi-directional output current for DDR-SDRAM termination.
The device integrates two power transistors to source or
sink current up to 1.5A. It also incorporates current-limit
and thermal shutdown protection.
The output voltage of LDO tracks the voltage at VREF pin.
An internal resistor divider is used to provide a half volt-
age of VREF for VTTREF and VTT Voltage. The VTT output
voltage is only requiring 20µF of ceramic output capaci-
tance for stability and fast transient response. The S3
and S5 pins provide the sleep state for VTT (S3 state)
and suspend state (S4/S5 state) for device, when S5 and
S3 are both pulled low the device provides the soft-off for
VTT and VTTREF.
Applications
DDR3 and DDR4 Memory Power Supplies
SSTL-2 SSTL-18 and HSTL Termination
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright © ANPEC Electronics Corp.
Rev. A.3 - Jan., 2015
1
www.anpec.com.tw

1 page




APW8861 pdf
APW8861
Electrical Characteristics
Refer to the typical application circuits. These specifications apply over VVCC=VBOOT=5V, VIN=12V and TA= -40 ~ 85oC, unless
otherwise specified. Typical values are at TA=25oC.
Symbol
Parameter
Test Conditions
APW8861
Min Typ Max
Unit
SUPPLY CURRENT
IVCC VCC Supply Current
IVCCSTB VCC Standby Current
IVCCSDN VCC Shutdown Current
ILDOIN LDOIN Supply Current
ILDOINSTB LDOIN Standby Current
ILDOINSDN LDOIN Shutdown Current
POWE R-O N-RESET
TA = 25oC, VS3 = VS5 = 5V, no load, VCC Current
TA = 25oC, VS3 = 0V, VS5 = 5V, no load, VCC
Current
TA =25oC, VS3 = VS5 = 0V, no load
TA = 25oC, VS3 = VS5 = 5V, no load
TA = 25oC, VS3 = 0V, VS5 = 5V, no load,
TA = 25oC, VS3 = VS5 = 0V, no load
-
-
-
-
-
-
160 200 µA
120 160 µA
0.1 1 µA
1 10
0.1 10 µA
0.1 1
VCC POR Threshold
VCC Rising
4.15 4.3 4.45 V
VCC POR Hysteresis
VTT OUTPUT
- 0.1 - V
VVTT VTT Output Voltage
VVTT VTT Output Tolerance
TSSVTT VTT Soft Start time
ILIM Current-Limit
VLDOIN = V VDDQSNS = 1.5V
VLDOIN = V VDDQSNS = 1.35V
VLDOIN = V VDDQSNS = 1.2V
VLDOIN = V VDDQSNS = 1.5V, VVDDQSNS/2 - VVTT,
IVTT = 0A
VLDOIN = V VDDQSNS = 1.5V, VVDDQSNS/2 - VVTT,
IVTT = 1A
VLDOIN = V VDDQSNS = 1.35V, VVDDQSNS/2 - VVTT,
IVTT = 0A
VLDOIN = V VDDQSNS = 1.35V, VVDDQSNS/2 - VVTT,
IVTT = 1A
VLDOIN = V VDDQSNS = 1.2V, VVDDQSNS/2 - VVTT,
IVTT = 0A
VLDOIN = V VDDQSNS = 1.2V, VVDDQSNS/2 - VVTT,
IVTT = 1A
S3 is go high to 0.95*VTT Regulation
Sourcing Current
(VLDOIN=1.5V)
Sinking Current
(VLDOIN=1.5V)
Sourcing Current
(VLDOIN=1.35V)
Sinking Current
(VLDOIN=1.35V)
TJ=25oC
TJ=125oC
TJ=25oC
TJ=125oC
TJ=25oC
TJ=125oC
TJ=25oC
TJ=125oC
- 0.75
- 0.675
- 0.6
-20 -
-
-
20
V
-30 -
30
-20 -
20
-30 -
-20 -
30
mV
20
-30 -
30
25 30 35 us
1.6 1.8 2.6
1.1 -
-
-1.6 -1.8 -2.6
-1.1 -
-
A
1.35 1.8
2.6
1.1 -
-
-1.45 -1.8 -2.6
-1.1 -
-
Copyright © ANPEC Electronics Corp.
Rev. A.3 - Jan., 2015
5
www.anpec.com.tw

5 Page





APW8861 arduino
APW8861
Typical Application Circuit
CBOOT
0.1uF
VDDQ
VIN
4.5V~26V
CIN
10uF x 2
VTT
VDDQ/2
CVTT
10uF x 2
VTTREF
VDDQ/2
CVTTREF
0.033uF
GND
VTTGND
VTTSNS
VTTREF
APW8861
TQFN4x4-32
VDDQSNS
PGND
CS
VCC
RCS
12K, 1%
LOUT
1uH
VDDQ
8A
COUT
22uF x4
(MLCC)
RVCC
VCC
2.2
CVCC
1uF
CPVCC
4.7uF
VDDQ
RTOP
75K, 1%
RGND
75K, 1%
RTON
620K
RPGOOD
100k
VIN or PHASE
PGOOD
Adjustable Output Voltage Regulator for VDDQ
Copyright © ANPEC Electronics Corp.
Rev. A.3 - Jan., 2015
11
www.anpec.com.tw

11 Page







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