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Número de pieza | AS5SP512K18 | |
Descripción | Synchronous SRAM | |
Fabricantes | Micross | |
Logotipo | ||
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No Preview Available ! Plastic Encapsulated Microcircuit
9Mb, 512K x 18, Synchronous SRAM
Pipeline Burst, Single Cycle Deselect
FEATURES
Synchronous Operation in relation to the input Clock
2 Stage Registers resulting in Pipeline operation
On chip address counter for Burst operations
Self-Timed Write Cycles
On-Chip Address and Control Registers
Byte Write support
Global Write support
On-Chip low power mode [powerdown] via ZZ pin
Interleaved or Linear Burst support via Mode pin
Three Chip Enables for ease of depth expansion
without Data Contention.
Two Cycle load, Single Cycle Deselect
Asynchronous Output Enable (OE\)
Three Pin Burst Control (ADSP\, ADSC\, ADV\)
3.3V Core Power Supply
3.3V/2.5V IO Power Supply
JEDEC Standard 100 pin TQFP Package
Available in Industrial (-40oC to +85oC), Enhanced
(-40oC to +105oC), and Mil-Temperature (-55oC to
+125oC) Operating Ranges
RoHS compliant options
NC
NC
NC
VDDQ
VSSQ
NC
NC
DQb
DQb
VSSQ
VDDQ
DQb
DQb
NC
VDD
NC
VSS
DQb
DQb
VDDQ
VSSQ
DQb
DQb
DQPb
NC
VSSQ
VDDQ
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
SSRAM
AS5SP512K18
SSRAM [SPB]
80 A
79 NC
78 NC
77 VDDQ
76 VSSQ
75 NC
74 DQPa
73 DQa
72 DQa
71 VSSQ
70 VDDQ
69 DQa
68 DQa
67 VSS
66 NC
65 VDD
64 ZZ
63 DQa
62 DQa
61 VDDQ
60 VSSQ
59 DQa
58 DQa
57 NC
56 NC
55 VSSQ
54 VDDQ
53 NC
52 NC
51 NC
FAST ACCESS TIMES
Parameter
Symbol
Cycle Time
tCYC
Clock Access Time
tCD
Output Enable Access tOE
200Mhz
5.0
3.0
3.0
166Mhz
6.0
3.5
3.5
133Mhz
7.5
4.0
4.0
Units
ns
ns
ns
BLOCK DIAGRAM
OE\
ZZ
CLK
CE1\
CE2
CE3\
BWE\
BWx\
GW\
ADV\
ADSC\
ADSP\
MODE
A0-Ax
CONTROL
BLOCK
BURST CNTL.
Address
Registers
Row
Decode
Column
Decode
I/O Gating and Control
Memory Array
x18
SBP
T Synchronous Pipeline
Burst
N Two (2) cycle load
N One (1) cycle
de-select
N One (1) cycle latency
on Mode change
Output Output
Register Driver
Input
Register
AS5SP512K18
Rev. 2.4 10/13
DQx, DQPx
1
GENERAL DESCRIPTION
Micross Components AS5SP512K18 is a 9.0Mb High
Performance Synchronous Pipeline Burst SRAM, available
in multiple temperature screening levels, fabricated using
High Performance CMOS technology and is organized as
a 512K x 18. It integrates address and control registers,
a two (2) bit burst address counter supporting four (4)
double-word transfers. Writes are internally self-timed and
synchronous to the rising edge of clock.
The AS5SP512K18 includes advanced control options
including Global Write, Byte Write as well as an
Asynchronous Output enable. Burst Cycle controls
are handled by three (3) input pins, ADV\, ADSP\ and
ADSC\. Burst operation can be initiated with either the
Address Status Processor (ADSP\) or Address Status Cache
controller (ADSC\) inputs. Subsequent burst addresses are
generated internally in the system’s burst sequence control
block and are controlled by Address Advance (ADV\)
control input.
Micross Components reserves the right to change products or specifications without notice.
1 page SSRAM
AS5SP512K18
ABSOLUTE MAXIMUM RATINGS*
Parameter
Voltage on VDD Pin
Voltage on VDDQ Pins
Voltage on Input Pins
Voltage on I/O Pins
Power Dissipation
Storage Temperature
Operating Temperatures
[Screening Levels]
Symbol
VDD
VDDQ
VIN
VIO
PD
tSTG
/IT
/ET
/XT
Min.
-0.3
VDD
-0.3
-0.3
-65
-40
-40
-55
Max.
4.6
VDD+0.3
VDDQ+0.3
1.6
150
85
105
125
Units
V
V
V
V
W
RC
RC
RC
RC
*Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions greater than
those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum conditions for any duration or segment of time
may affect device reliability.
AC TEST LOADS
Output
Zo=50 ohm
Rt = 50 ohm
Diagram [A] 30 pF
Vt= Termination Voltage
Rt= Termination Resistor
Vt= 1.50v for 3.3v VDDQ
Vt= 1.25v for 2.5v VDDQ
3.3/2.5v
R= 351 [email protected]
R= 1538 [email protected]
R= 317 [email protected]
R= 1667 [email protected]
Output
5 pF
Diagram [B]
DC ELECTRICAL CHARACTERISTICS
(VDD=3.3v +10%/-5%, TA= Min. and Max temperatures of Screening level chosen)
Symbol
VDD
VDDQ
VoH
VoL
VIH
VIL
IIL
IZZL
IOL
IDD
ISB1
ISB2
Parameter
Power Supply Voltage
I/O Supply Voltage
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage (except ZZ) & Mode
Input Leakage, ZZ pin & Mode
Output Leakage
Operating Current
Automatic CE. Power-down
Current -TTL inputs
Automatic CE. Power-down
Current - CMOS Inputs
Test Conditions
VDD=Min., IOH=-4mA
VDD=Min., IOH=-1mA
VDD=Min., IOL=8mA
VDD=Min., IOL=1mA
VDD=Max., VIN=VSS to VDD
3.3v
2.5v
3.3v
2.5v
3.3v
2.5v
3.3v
2.5v
Output Disabled, VOUT=VSSQ to VDDQ
VDD=Max., f=Max.,
5.0ns Cycle, 200 Mhz
IOH=0mA
6.0ns Cycle, 166 Mhz
7.5ns Cycle, 133 Mhz
Max. VDD, Device De-Selected,
VIN>/=VIH or VIN</=VIL
5.0ns Cycle, 200 Mhz
f=fMAX=1/tCYC
6.0ns Cycle, 166 Mhz
7.5ns Cycle, 133 Mhz
Max. VDD, Device De-Selected, VIN</=0.3v or VIN>/=VDDQ-0.3v
f=0
Min Max Units Notes
3.135 3.63
2.375 VDD
2.4
2
0.4
0.4
2 VDD+0.3
1.7 VDD+0.3
-0.3 0.8
-0.3 0.7
-5 5
-30 30
-5 5
290
270
240
V
V
V
V
V
V
V
V
V
V
uA
uA
uA
mA
mA
mA
1
1,5
1,4
1,4
1,4
1,4
1,2
1,2
1,2
1,2
3
3
200 mA
180 mA
160 mA
130 mA
AS5SP512K18
Rev. 2.4 10/13
Micross Components reserves the right to change products or specifications without notice.
5
5 Page SSRAM
AS5SP512K18
MECHANICAL DIAGRAM
100-Pin TQFP (Package Designator DQ)
100
1
16.00±0.20
14.00±0.10
81
80
0.30±0.08
1.40±0.05
R 0.08 MIN.
0.20 MAX.
0.25
GAUGE PLANE
0° -7°
0.60±0.15
1.00 REF.
30
31
0° MIN.
R 0.08 MIN.
0.20 MAX.
0.20 MIN.
DETAIL A
0.65
TYP.
51
50
12° ±1°
(8X)
SEE DETAIL
A
0.20 MAX.
1.60 MAX.
STAND-OFF
0.05 MIN.
0.15 MAX.
SEATING PLANE
NOTE:
1. JEDEC STD REF MS-026
2. BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH
MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.0098 in (0.25 mm) PER SIDE
BODY LENGTH DIMENSIONS ARE MAX PLASTIC BODY SIZE INCLUDING MOLD MISMATCH
3. DIMENSIONS IN MILLIMETERS
51-85050-*B
AS5SP512K18
Rev. 2.4 10/13
11
Micross Components reserves the right to change products or specifications without notice.
11 Page |
Páginas | Total 13 Páginas | |
PDF Descargar | [ Datasheet AS5SP512K18.PDF ] |
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