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PDF PI6C4911510 Data sheet ( Hoja de datos )

Número de pieza PI6C4911510
Descripción 2.5V/3.3V 1.5GHz Low Skew 1-to-10 Differential to LVPECL Fanout Buffer
Fabricantes Pericom Semiconductor 
Logotipo Pericom Semiconductor Logotipo



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No Preview Available ! PI6C4911510 Hoja de datos, Descripción, Manual

PI6C4911510
2.5V/3.3V 1.5GHz Low Skew 1-to-10 Differential to LVPECL
Fanout Buffer with 2 to 1 Differential Clock Input Mux
Features
ÎÎFMAX < 1.5GHz
ÎÎ10 pairs of differential LVPECL outputs
ÎÎLow additive jitter, < 0.03ps (typ)
ÎÎSelectable differential input pairs with single ended input
option
ÎÎInput CLK accepts: LVPECL, LVDS, CML, SSTL input level
ÎÎOutput skew: 40ps (typ)
ÎÎOperating Temperature: -40oC to 85oC
ÎÎCore Power supply: 2.5V ±5% & 3.3V ±10%, Output Power
supply: 2.5V ±5% & 3.3V ±10%
ÎÎPackaging (Pb-free & Green):
ÎÎ32-pin QFN and TQFP available
Description
The PI6C4911510 is a high-performance low-skew 1-to-10 LVPECL
fanout buffer. The PI6C4911510 features two selectable dif-
ferential clock inputs and translates to ten LVPECL outputs.
The CLK inputs accept LVPECL, LVDS, CML and SSTL signals.
PI6C4911510 is ideal for clock distribution applications such as
providing fanout for low noise SaRonix-eCera oscillators.
Block Diagram
Pin Configuration
15-0077
24 23 22 21 20 19 18 17
VDDO 25
16 vDDO
/Q2 26
15 Q7
Q2 27
14 /Q7
/Q1 28
13 Q8
Q1 29
12 /Q8
/Q0 30
11 Q9
Q0 31
10 /Q9
vDDO 32
9 vDDO
123 4 5 6 78
1
PI6C4911510
Rev H 6/25/2015

1 page




PI6C4911510 pdf
PI6C4911510
2.5V/3.3V 1.5GHz Low Skew 1-to-10 Differential to
LVPECL Fanout Buffer w/ 2 to 1 Differential Clock Input Mux
Phase Noise and Additive Jitter
Output phase noise (Dark Blue) vs Input Phase noise (light blue)
Additive jitter is calculated at ~27fs RMS (12kHz to 20MHz). Additive jitter = √(Output jitter2 - Input jitter2)
Configuration Test Load Board Termination for LVPECL Outputs
LVPECL Buffer
VDDQx
Zo = 50
L = 0 ~ 10 in.
150
Zo = 50
150
100
15-0077
5
PI6C4911510
Rev H 6/25/2015

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