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PDF PI4IOE5V9673 Data sheet ( Hoja de datos )
| Número de pieza | PI4IOE5V9673 | |
| Descripción | Remote 16-bit I/O expander | |
| Fabricantes | Pericom Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de PI4IOE5V9673 (archivo pdf) en la parte inferior de esta página. Total 14 Páginas | ||
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Features
PI4IOE5V9673
Remote 16-bit I/O expander for Fm+ I2C-bus with interrupt and reset
Description
Operation power supply voltage from 2.3V to 5.5V
16-bit remote I/O pins that default to inputs at power-
up
1 MHz I2C-bus interface
Compliant with the I2C-bus Fast and Standard modes
5.5V tolerant I/Os
SDA with 30 mA sink capability for 4000 pF buses
Latched outputs with 25 mA sink capability for
directly driving LEDs
Total package sink capability of 400 mA
Active LOW open-drain interrupt output
Low standby current
16 programmable slave addresses using 2 address
pins
ESD protection (4KV HBM and 1KV CDM)
Latch-up tested (exceeds 100mA)
Offered in three different packages: TSSOP-24 and
TQFN 4x4-24
The PI4IOE5V9673 provides general purpose
remote I/O expansion for most microcontroller families
via the two-line bidirectional bus (I2C-bus) and is a part
of the Fast-mode Plus family.
The PI4IOE5V9673 provides higher Fast-mode Plus
(Fm+) I2C-bus speeds (1 MHz versus 400 kHz) so that
the output can support PWM dimming of LEDs,
higheI2C-bus drive (30 mA) so that many more devices
can be on the bus without the need for bus buffers, high
total package sink capacity (400 mA) that supports
having all 25 mA LEDs on at the same time and more
device addresses (16) are available to allow many more
devices on the bus without address conflicts.
The device consists of a 16-bit quasi-bidirectional
port and an I2C-bus interface. The PI4IOE5V9673 has a
low current consumption and includes latched outputs
with high current drive capability for directly driving
LEDs.
It also possesses an interrupt line (INT) which can be
connected to the interrupt logic of the microcontroller.
By sending an interrupt signal on this line, the remote
I/O can inform the microcontroller if there is incoming
data on its ports without having to communicate via the
I2C-bus. The internal Power-On Reset (POR) or
software reset sequence initializes the I/Os as inputs.
Pin Configuration
Figure 1: TSSOP-24 (Top View)
2016-01-0022
Figure 2: TQFN 4x4-24 (Top View)
PT0553-4
02/15/16
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PI4IOE5V9673
Preliminary Datasheet
16-bit I2C-bus and SMBus I/O port with interrupt and reset
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Dynamic Characteristics
Table 3: Dynamic characteristics
Symbol
Parameter
fSCL
tBUF
tHD;STA
tSU;STA
tSU;STO
tVD;ACK[1]
tHD;DAT[2]
SCL clock frequency
bus free time between a STOP and
START condition
hold time (repeated) START condition
set-up time for a repeated START
condition
set-up time for STOP condition
data valid acknowledge time
data hold time
tVD;DAT data valid time
tSU;DAT data set-up time
tLOW LOW period of the SCL clock
tHIGH HIGH period of the SCL clock
tf fall time of both SDA and SCL signals
tr rise time of both SDA and SCL signals
tSP
pulse width of spikes that must be
suppressed by the input filter
Port timing CL≤100pF
tv(Q) Data output valid time[3]
tsu(D) Data input set-up time
Th(D) Data input hold time
Interrupt timing CL≤100pF
tv(INT)
Valid time on pin INT
trst(INT)
Reset time on pin INT
Reset timing
tw(rst)
Reset pulse width
trec(rst) Reset recovery time
trst Reset time
td(rst)
Reset time on pin INT
Standard mode I2C
Min Max
0 100
4.7 -
4.0 -
4.7 -
4.0 -
- 3.45
0-
- 3.45
250 -
4.7 -
4.0 -
- 300
- 1000
- 50
4
0
4
-4
-4
25
0
1
-4
Fast mode I2C
Min Max
0 400
1.3 -
0.6 -
0.6 -
0.6 -
- 0.9
0-
- 0.9
100 -
1.3 -
0.6 -
- 300
- 300
- 50
Fast mode
Plus I2C
Min Max
0 1000
0.5
0.26
0.26
0.26
- 0.45
0
- 0.45
50
0.5
0.26
- 120
- 120
50
Unit
kHz
μs
μs
μs
μs
μs
ns
ns
ns
μs
μs
ns
ns
ns
4 4 ns
0 0 ns
4 4 μs
-4
-4
4 μs
4 μs
-
25 -
25 ns
-
0-
0 ns
-
1-
1 us
-4
4 μs
Note:
[1]: tVD;ACK = time for acknowledgement signal from SCL LOW to SDA (out) LOW.
[2]: tVD;DAT = minimum time for SDA data out to be valid following SCL LOW.
[3]: tv(Q)measured from 0.7VCC on SCL to 50% I/O output.
2016-01-0022
PT0553-4
02/15/16
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PI4IOE5V9673
Preliminary Datasheet
16-bit I2C-bus and SMBus I/O port with interrupt and reset
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RESET input
Figure 10. Application of multiple P4IOE5V9673s with interrupt
A reset can be accomplished by holding the RESET pin LOW for a minimum of tw(rst). The PI4IOE5V9673 registers and
I2C-bus state machine will be held in their default state until the RESET input is once again HIGH. The I2C-bus is for 2-way, 2-
line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL).
Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data
transfer may be initiated only when the bus is not busy.
Bidirectional I/O expander applications
In the 8-bit I/O expander application shown in Figure 11, P00 and P01 are inputs, and P02 to P07 are outputs. When used in
this configuration, during a write, the input (P00 and P01) must be written as HIGH so the external devices fully control the input
ports. The desired HIGH or LOW logic levels may be written to the I/Os used as outputs (P02 to P07). During a read, the logic
levels of the external devices driving the input ports (P00 and P01) and the previous written logic level to the output ports (P02 to
P07) will be read. The GPIO also has an interrupt line (INT) that can be connected to the interrupt logic of the microprocessor. By
sending an interrupt signal on this line, the remote I/O informs the microprocessor that there is incoming data or a change of data
on its ports without having to communicate via the I2C-bus.
2016-01-0022
Figure 11. Bidirectional I/O expander application
PT0553-4
11
02/15/16
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet PI4IOE5V9673.PDF ] | |
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