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PDF CPC5620 Data sheet ( Hoja de datos )
| Número de pieza | CPC5620 | |
| Descripción | Phone Line Interface IC | |
| Fabricantes | IXYS | |
| Logotipo |  |
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INTEGRATED CIRCUITS DIVISION
CPC5620/CPC5621
LITELINK® III
Phone Line Interface IC (DAA)
Features
• Superior voice solution with low noise, excellent
part-to-part gain accuracy
• 3 kVrms line isolation
• Transmit power of up to +10 dBm into 600
• Data access arrangement (DAA) solution for
modems at speeds up to V.92
• 3.3 or 5 V power supply operation
• Caller ID signal reception function
• Easy interface with modem ICs and voice CODECs
• Worldwide dial-up telephone network compatibility
• CPC5620 and CPC5621 can be used in circuits that
comply with the requirements of TIA/EIA/IS-968
(FCC part 68), UL1950, UL60950, EN/IEC 60950-1
Supplementary Isolation compliant, EN55022B,
CISPR22B, EN55024, and TBR-21
• Line-side circuit powered from telephone line
• Compared to other silicon DAA solutions, LITELINK:
- Uses fewer passive components
- Takes up less printed-circuit board space
- Uses less telephone line power
- Offers simplified operation
- Is a single-IC solution
Applications
• Computer telephony and gateways, such as VoIP
• PBXs
• Satellite and cable set-top boxes
• V.92 (and other standard) modems
• Fax machines
• Voicemail systems
• Embedded modems for POS terminals, automated
banking, remote metering, vending machines,
security, and surveillance
Description
LITELINK III is a single-package silicon phone line
interface (PLI) DAA used in voice and data
communication applications to make connections
between low-voltage equipment and high-voltage
telephone networks.
LITELINK provides a high-voltage isolation barrier, AC
and DC phone line terminations, switch hook, 2-wire to
4-wire hybrid, ring detection, and on-hook signal
detection. LITELINK can be used in both differential
and single-ended signal applications.
LITELINK uses on-chip optical components and a few
inexpensive external components to form a complete
voice or high-speed data phone line interface.
LITELINK eliminates the need for large isolation
transformers or capacitors used in other interface
configurations. It includes the required high-voltage
isolation barrier in a surface-mount SOIC package.
The CPC5620 (half-wave ringing detect) and
CPC5621 (full-wave ringing detect) build upon IXYS
Integrated Circuits Division’s LITELINK product line,
with improved insertion loss control, improved noise
performance, and lower minimum current draw from
the phone line. The new mode pin enables worldwide
implementation.
Ordering Information
Part Number
CPC5620A
CPC5620ATR
CPC5621A
CPC5621ATR
Description
32-pin SOIC, half-wave ring detect, 50/Tube
32-pin SOIC, half-wave ring detect, 1000/Reel
32-pin SOIC, full-wave ring detect, 50/Tube
32-pin SOIC, full-wave ring detect, 1000/Reel
CPC5620/CPC5621 Block Diagram
Is3oklVartmiosn
Pb e3
Tx+
Tx-
MODE
OH
RING
CID
Rx+
Rx-
Transmit
Diff.
Amplifier
Isolation Barrier
Transmit
Isolation
Amplifier
Transconductance
Stage
2-4 Wire Hybrid
AC/DC Termination
Hookswitch
Receive
Diff.
Amplifier
Vref
Gain Trim
CID/
RING
MUX
Vref
Gain Trim
Receive
Isolation
Amplifier
Snoop Amplifier
CSNOOP
CSNOOP
RSNOOP
RSNOOP
TIP+
VI Slope Control
AC Impedance Control
Current Limit Control
RING-
DS-CPC5620/CPC5621-R05
www.ixysic.com
1
1 page  
INTEGRATED CIRCUITS DIVISION
1.3 Pin Description
Pin Name
1 VDD
2 TXSM
3 TX-
4 TX+
5 TX
6 MODE
7 GND
8 OH
9 RING
10 CID
11 RX-
12 RX+
13 SNP+
14 SNP-
15 RXF
16 RX
17 VDDL
18 RXS
19 RPB
20 BR-
21 ZDC
22 DCS2
23 DCS1
24 NTF
25 GAT
26 NTS
27 BR-
28 TXSL
29 ZNT
30 ZTX
31 TXF
32 REFL
Function
Low-voltage (CPE) side power supply
Transmit summing junction
Negative differential transmit signal to DAA
from low-voltage side
Positive differential transmit signal to DAA from
low-voltage side
Transmit differential amplifier output
When asserted low, changes gain of TX path
(-7 dB) and RX path (+7 dB) to accommodate
reactive termination networks
Low-voltage (CPE) side analog ground
Assert logic low for off-hook operation
Ringing Detect Output
Assert logic low while on hook to allow CID
information to be passed to the RX+ and RX-
output pins.
Negative differential analog signal received
from the telephone line. Must be AC coupled
with 0.1 F.
Positive differential analog signal received from
the telephone line. Must be AC coupled with
0.1 F.
Positive differential snoop input
Negative differential snoop input
Receive photodiode amplifier output
Receive photodiode summing junction
Power supply for line side, regulated from tip
and ring.
Receive isolation amp summing junction
Receive LED pre-bias current set
Bridge rectifier return
Electronic inductor DCR/current limit
DC feedback output
V to I slope control
Network amplifier feedback
External MOSFET gate control
Receive signal input
Bridge rectifier return
Transmit photodiode summing junction
Receiver impedance set
Transmit transconductance gain set
Transmit photodiode amplifier output
1.25 VDC reference
Figure 1. Pinout
1 VDD
2 TXSM
3 TX-
4 TX+
5 TX
6 MODE
7 GND
8 OH
9 RING
10 CID
11 RX-
12 RX+
13 SNP+
14 SNP-
15 RXF
16 RX
R05 www.ixysic.com
CPC5620/CPC5621
REFL
TXF
ZTX
ZNT
TXSL
BR-
NTS
GAT
NTF
DCS1
DCS2
ZDC
BR-
RPB
RXS
VDDL
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
5
5 Page 
INTEGRATED CIRCUITS DIVISION
half-cycle of the ringing signal for the CPC5620. For
the CPC5621, the RING output returns high for a short
period near the zero-crossing of the ringing signal
before returning low during the positive half-cycle. For
both the CPC5620 and CPC5621, the RING output
remains high between ringing signal bursts.
The ringing detection threshold depends on the values
of R3 (RSNPD), R6 & R44 (RSNP-), R7 & R45 (RSNP+),
C7 (CSNP-), and C8 (CSNP+). The value of these
components shown in the application circuits are
recommended for typical operation. The ringing
detection threshold can be changed according to the
following formula:
VRINGPK
=
7-R---5-S--0-N--m-P---D-V--
RSNPTOTAL + RSNPD2 + -------f--R---I--N---G-1---C----S---N---P------2
Where:
• RSNPD = R3 in the application circuits shown in this
data sheet.
• RSNPTOTAL = the total of R6, R7, R44, and R45 in
the application circuits shown in this data sheet.
• CSNP = C7 = C8 in the application circuits shown in
this data sheet.
• And ƒRING is the frequency of the ringing signal.
IXYS Integrated Circuits Division Application Note
AN-117 Customize Caller ID Gain and Ring Detect Voltage
Threshold is a spreadsheet for trying different
component values in this circuit. Changing the ringing
detection threshold will also change the caller ID gain
and the timing of the polarity reversal detection pulse,
if used.
3.2.2 Polarity Reversal Detection with
CPC5621 in On-hook State
The full-wave ringing detector in the CPC5621 makes
it possible to detect on-hook tip and ring polarity
reversal using the RING output. When the polarity of
tip and ring reverses, a pulse on RING indicates the
event. Your system logic must be able to discriminate
this single pulse of approximately 1 msec (using the
recommended snoop circuit external components)
from a valid ringing signal.
CPC5620/CPC5621
3.2.3 On-hook Caller ID Signal Reception
On-hook caller ID (CID) signals are processed by
LITELINK by coupling the CID data burst through the
snoop circuit to the LITELINK RX outputs under
control of the CID pin. In North America, CID data
signals are typically sent between the first and second
ringing signal.
In North American applications, follow these steps to
receive on-hook caller ID data via the LITELINK RX
outputs:
1. Detect the first ringing signal outputs on RING.
2. Assert CID low.
3. Process the CID data from the RX outputs.
4. De-assert CID (high or floating).
Note: Taking LITELINK off-hook (via the OH pin)
disconnects the snoop path from both the receive
outputs and the RING output, regardless of the state
of the CID pin.
CID gain from tip and ring to RX+ and RX- is
determined by:
GAINCIDdB = 20log ---------------------------------------6---R----S---N----P---D----------------------------------------
RSNPTOTAL + RSNPD2 + -------f--C---1-S---N---P-----2-
Where:
• RSNPD = R3 in the application circuits in this data
sheet
• RSNPTOTAL = the total of R6, R7, R44, and R45 in
the application circuits in this data sheet
• CSNP = C7 = C8 in the application circuits in this data
sheet
• and where ƒ is the frequency of the CID signal
The recommended components in the application
circuit yield a gain 0.27 dB at 2000 Hz. IXYS
Integrated Circuits Division Application Note AN-117
Customize Caller ID Gain and Ring Detect Voltage Threshold
is a spreadsheet for trying different component values
in this circuit. Changing the CID gain will also change
the ring detection threshold and the timing of the
polarity reversal detection pulse, if used.
R05 www.ixysic.com
11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet CPC5620.PDF ] | |
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