Datasheet 74LVTH573MSA Equivalent ( PDF ) - Latch

74LVT573 74LVTH573 Low Voltage Octal Transparent Latch with 3-STATE Outputs March 1999 Revised March 1999 74LVT573 74LVTH573 Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVT573 and LVTH573 consist of eight latches with 3STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable (LE) is HIGH. When LE is l

The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

The 74LCX00 device is a low-voltage CMOS quad dual input NAND gate manufactured with sub-micron silicon gate and double layer metal wiring C2MOS technology. It is ideal for low-power and high-speed 3.3 V applications and can be interfaced to a 5 V signal environment for inputs.

The 74LCX00M contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation..

The 74LCX00MTC contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

The 74LCX00MTCX contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

The 74LCX00SJ contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX00 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.