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Datasheet 74AUP1G04 Equivalent ( PDF ) |
| N.º | Número de pieza | Descripción | Fabricantes | |
| 3 | 74AUP1G04 | Low-power inverter
74AUP1G04
Low-power inverter
Rev. 02 — 28 June 2006 Product data sheet
1. General description
The 74AUP1G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes t |
 NXP Semiconductors |
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| 2 | 74AUP1G04 | Low power single inverter gate
74AUP1G04
Low power single inverter gate
Features
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High speed: tPD = 4.3 ns (max.) at VCC = 2.3 V Power down protection on inputs and outputs Balanced propagation delays: tPLH ≈ tPHL Operating voltage range: VCC (opr) = 1.2 to 3.6 V Low power dissip |
 STMicroelectronics |
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| 1 | 74AUP1G04 | SINGLE INVERTER GATE Description
The Advanced, Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.
The 74AUP1G04 is a single inverter gate with a standard push-pull output designed for operation over a power supply range of 0.8V to 3.6V. The device is ful |
 Diodes |
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